Global Standards for the Microelectronics Industry
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Displaying 1 - 3 of 3 documents.
Title |
Document # | Date |
|---|---|---|
204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-S0-DIMM Design Specification |
MODULE4.20.21 | Aug 2012 |
Release 22. Item 2189.17 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PSO-N/PQFN PINOUTS STANDARDIZED FOR 14-, 16-, 20-, AND 24-LEAD LOGIC FUNCTIONS: |
JESD75-6 | Mar 2006 |
This standard defines device pinouts for 14-, 16-, 20-, and 24-lead logic functions. This pinout standard specifically applies to the conversion of DIP-packaged logic devices to PSO-N/PQFN packages logic devices The purpose of this standard is to provide a pinout standard for 14-, 16-, 20-, and 24-lead logic devices offered in 14-, 16-, 20-, and 24-lead PSO-N/PQFN packages for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use Free download. Registration or login required. |
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SPD General Standard. |
SPD4.1.2 | Jul 2008 |
Release No. 19. Item 2065.26 Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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