Global Standards for the Microelectronics Industry
Standards & Documents Search
Title |
Document # | Date |
|---|---|---|
UNIVERSAL FLASH STORAGE (UFS), Version 3.1 |
JESD220E | Jan 2020 |
This document has been superseded by JESD220F, August 2022, however is available for reference only. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s): JC-64.1 Available for purchase: $355.00 Add to Cart Paying JEDEC Members may login for free access. |
||
SPD Annex A, Table of Memory Types |
SPD4.1.2.1 | Apr 2003 |
Release No.12 Committee(s): JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD |
JESD218B.02 | Jun 2022 |
Terminology Update, see Annex. This standard defines JEDEC requirements for solid state drives. For each defined class of solid state drive, the standard defines the conditions of use and the corresponding endurance verification requirements. Although endurance is to be rated based upon the standard conditions of use for the class, the standard also sets out requirements for possible additional use conditions as agreed to between manufacturer and purchaser. Revision A includes further information on SSD Capacity. Items 303.19, 303.20, 303.21, 303.22, 303.23, 303.26, 303.27, 303.28, and 303.32 Committee(s): JC-64.8 Available for purchase: $76.00 Add to Cart Paying JEDEC Members may login for free access. |
||
Registration - FBDIMM (Fully Buffered Dual Inline Memory Module) Family, 1.00 mm Contact Centers. |
MO-256-F | Jun 2007 |
Item 11.14-108 Committee(s): JC-11.14 Free download. Registration or login required. |
||
Registration - Dual Inline Memory Module (DIMM) Family, 184 Pin DDR w/ 1.27 mm Contact Centers. Item 11.14-078 |
MO-206-E | Jan 2006 |
Committee(s): JC-11.14 Free download. Registration or login required. |
||
Registration - DDR2 SDRAM DIMM (Dual Inline memory Module) Family, Flex-Based, 1.00 mm Contact Centers. |
MO-281-A | Nov 2006 |
Item 11.14-100 Patents(): STAKTEK: See Outline Committee(s): JC-11 Free download. Registration or login required. |
||
Registration - DDR1/DDR2/DDR3, 144 Pin, 16b/32b Small Outline Dual Inline Memory Module (SODIMM) Family, 0.8 mm Pitch. DIMM |
MO-274D | Oct 2014 |
Item 11.14-171 Free download. Registration or login required. |
||
POD15 - 1.5 V PSEUDO OPEN DRAIN I/O |
JESD8-20A.01 | Aug 2022 |
Terminology Update.This standard defines the dc and ac single-ended (data) and differential (clock) operating conditions, I/O impedance, and the termination and calibration scheme for 1.5 V Pseudo Open Drain I/Os. The 1.5 V Pseudo Open Drain interface, also known as POD15, is primarily used to communicate with GDDR4 and GDDR5 SGRAM devices. Item 135.01 Committee(s): JC-16 Free download. Registration or login required. |
||
POD135 - 1.35 V PSEUDO OPEN DRAIN I/O |
JESD8-21C.01 | Jun 2022 |
Editorial, Terminology Update. This standard defines the dc and ac single-ended (data) and differential (clock) operating conditions, I/O impedance's, and the termination and calibration scheme for 1.35 V Pseudo Open Drain I/Os. The 1.35 V Pseudo Open Drain interface, also known as POD135, is primarily used to communicate with GDDR5 or GDDR5M SGRAM devices. Item 146.01B Committee(s): JC-16 Free download. Registration or login required. |
||
POD10-1.0 V PSUEDO OPEN DRAIN INTERFACE |
JESD8-25 | Sep 2011 |
This document defines the 1.0 V Pseudo Open Drain Interface family of interface standards, POD10, which are generally expected to be implemented with differential amp-based input buffers that, when in single-ended mode, employ an externally supplied (or internal supplied) reference voltage controlled trip-point. Committee(s): JC-16 Free download. Registration or login required. |
||
