Global Standards for the Microelectronics Industry
Standards & Documents Search
Displaying 1 - 1 of 1 documents.
ADDENDUM No. 2 to JESD24 - GATE CHARGE TEST METHOD:Status: ReaffirmedOctober 2002
|JESD24- 2||Jan 1991|
This addendum establishes a method for measuring power device gate charge. A gate charge test is performed by driving the device gate with a constant current and measuring the resulting gate voltage response. Constant gate current scales the gate voltage, a function of time, to a function of coulombs. The slope of the generated response reflects the active device capacitance as it varies during the switching transition . Gate charge measurements are useful for characterizing the large signal switching performance of power MOS and IGBT devices. Developed over a four year span by the JEDEC JC-25 Committee, the method defines a repeatable means of measuring the widely published Qgd charge values.