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Title Document # Date

Standard Practices and Procedures - Mold Flash, Interlead Flash, Gate Burrs and Protrusion for Plastic Packages. Item 11.2-379.

 SPP-014 Jul 1994

Committee(s): JC-11, JC-11.2

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48 Lead, Very, Very Thin Small Outline Package, Type 1. WR-PDSO1, WSOP1. Item 11.11-701.

 MO-259-A Mar 2005

Committee(s): JC-11, JC-11.11

JEP95 Registrations Main Page

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MULTIMEDIACARD (MMC) ELECTRICAL STANDARD, STANDARD CAPACITY (MMCA, 4.1)

 JESD84-B41 Jun 2007

This document provides a comprehensive definition of the MultiMediaCard, its environment, and handling. It also provides design guidelines and defines a tool box of macro functions and algorithms intended to reduce design-in costs.

Patents(): Samsung; Qimonda; Nokia

Committee(s): JC-64, JC-64.1

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MULTIMEDIACARD (MMC) ELECTRICAL STANDARD, HIGH CAPACITY (MMCA, 4.2)

 JESD84-B42 Jul 2007

The purpose of the specification is the definition of the e•MMC, its environment and handling. It provides guidelines for systems designers. The specification also defines a tool box (a set of macro functions and algorithms) that contributes to reducing design-in costs.

Committee(s): JC-64.1, JC-64

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Registration - Low Profile, Fine Pitch, Ball Grid Array (FBGA) Registration, 0.80 mm pitch (Square and Rectangle). LF-XBGA, LFR-XBGA.

MO-219-G Jan 2007

Item 11.11-763

Committee(s): JC-11, JC-11.11

JEP95 Registrations Main Page

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NAND Flash Interface Interoperability

 JESD230G Oct 2024

This standard was jointly developed by JEDEC and the Open NAND Flash Interface Workgroup, hereafter referred to as ONFI. This standard defines a standard NAND flash device interface interoperability standard that provides means for system be designed that can support Asynchronous SDR, Synchronous DDR and Toggle DDR NAND flash devices that are interoperable between JEDEC and ONFI member implementations.

Committee(s): JC-42, JC-42.4

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SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP)

This document replaces JESD216F.01, Editorial changes to this document were approved by the TG, June 2022 		JESD216F.02 Jun 2022

The Serial Flash Discoverable Parameter (SFDP) standard provides a consistent method of describing the functional and feature capabilities of serial flash devices in a standard set of internal parameter tables. These parameter tables can be interrogated by host system software to enable adjustments needed to accommodate divergent features from multiple vendors. Any company may request a Function Specific ID by making a request to the JEDEC office at juliec@jedec.org. Please include “Function Specific ID Request, JESD216” in the email subject line. Item 1775.73. Editorial changes listed in Annex, from original publication of JESD216F (December 2021).

Committee(s): JC-42.4

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UNIVERSAL FLASH STORAGE (UFS), Version 3.0

Status: Superseded January 2020 		JESD220D Jan 2018

This document has been superseded by JESD220E, January 2020, however is available for reference only.

Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office.

Committee(s): JC-64.1

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To help cover the costs of producing standards, JEDEC is now charging for non-member access to selected standards and design files. Most of the content on this site remains free to download with registration. Paying JEDEC member companies enjoy free access to all content. Learn more and apply today.

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SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD

 JESD218B.03 Aug 2024

Terminology Update, see Annex. This standard defines JEDEC requirements for solid state drives. For each defined class of solid state drive, the standard defines the conditions of use and the corresponding endurance verification requirements. Although endurance is to be rated based upon the standard conditions of use for the class, the standard also sets out requirements for possible additional use conditions as agreed to between manufacturer and purchaser.  Revision A includes further information on SSD Capacity. Items 303.19, 303.20, 303.21, 303.22, 303.23, 303.26, 303.27, 303.28, and 303.32

Committee(s): JC-64.8

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Secure Serial Flash Bus Transactions

Release Number: Version 1.0 		JESD254 Dec 2022

This standard describes SPI bus transactions intended to support Secure Flash operation on a serial memory device. The on-chip SFDP database described in JESD216 has been revised to include details about the secure transactions. This ballot does not describe the SFDP revisions or the secure packet structure.

Patents(): Infineon- US 10868679B1 and Micron- US 9009394B2

Committee(s): JC-42, JC-42.4

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