Global Standards for the Microelectronics Industry
Standards & Documents Search
Displaying 1 - 3 of 3 documents.
| Title | Document # | Date |
|---|---|---|
STANDARD - Dual In-Line Gauge. (Ties with all Shrink P-DIPs). Variations AA-BD. Item 11.11-315. |
GS-003C | Mar 1993 |
Committee(s): JC-11 Free download. Registration or login required. |
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TEST BOARDS FOR THROUGH-HOLE PERIMETER LEADED PACKAGE THERMAL MEASUREMENTS: |
JESD51-10 | Jul 2000 |
This standard covers the design of printed circuit boards (PCBs) used in the thermal characterization of Dual-Inline Packages (DIP) and Single-Inline Packages (SIP). It is intended to be used in conjunction with the JESD51 series of standards that cover the test methods and test environments. JESD51-10 was developed to give a figure-of-merit of thermal performance that allows for accurate comparisons of packages from different suppliers. It can be used to give a first order approximation of system performance and, in conjunction with the other JESD51 PCB standards, allows for comparisons of the various package families. Committee(s): JC-15.1 Free download. Registration or login required. |
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BALL GRID ARRAY PINOUTS STANDARDIZED FOR 16-BIT LOGIC FUNCTIONS: |
JESD75-2 | Jul 2001 |
This standard provides a pinout standard for 16-bit wide logic devices offered in a 56-ball areagrid array package to provide for uniformity, multiplicity of sources, elimination of confusion,ease of device specification, and ease of use. Committee(s): JC-40 Free download. Registration or login required. |
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