Global Standards for the Microelectronics Industry
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Displaying 1 - 3 of 3 documents.
Title | Document # |
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LRDIMM DDR3 MEMORY BUFFER (MB) |
JESD82-30 | Oct 2014 |
The Load Reduced DIMM (LRDIMM) Memory Buffer (MB) supports DDR3 SDRAM main memory. The Memory Buffer allows buffering of memory traffic to support large memory capacities. Unlike DDR3 Register Buffer (SSTE32882), which only buffers Command, Address, Control and Clock, the LRDIMM Memory Buffer also buffers the Data (DQ) interface between the Memory Controller and the DRAM components. The Memory Buffer interface is responsible for memory requests to and from the local DIMM. LRDIMM provides a high memory bandwidth, large capacity channel solution for DDR3 main memory systems. LRDIMM uses commodity DRAMs isolated from the channel behind the Memory Buffer on the DIMM. Free download. Registration or login required. |
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Registration - DDR1/DDR2/DDR3, 144 Pin, 16b/32b Small Outline Dual Inline Memory Module (SODIMM) Family, 0.8 mm Pitch. DIMM |
MO-274D | Oct 2014 |
Item 11.14-171 Free download. Registration or login required. |
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204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-S0-DIMM Design Specification |
MODULE4.20.21 | Aug 2012 |
Release 22. Item 2189.17 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |