Global Standards for the Microelectronics Industry
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Title | Document # | Date |
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JEDEC® Memory Module Reference Base Standard – for Compute Express Link® (CXL®) |
JESD317A | Mar 2024 |
This standard defines the specifications of interface parameters, signaling protocols, environmental requirements, packaging, and other features as reference for specific target implementations of CXL-attached memory modules. Committee(s): JC-45 Free download. Registration or login required. |