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ZENER AND VOLTAGE REGULATOR DIODE RATING VERIFICATION AND CHARACTERIZATION TESTING

 JESD211.01 Nov 2012

This standard is applicable to diodes that are used as voltage regulators and voltage references. It describes terms and definitions and explains methods for verifying device ratings and measuring device characteristics.

Committee(s): JC-22, JC-22.2

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XFM DEVICE, Version 1.0

 JESD233 Aug 2021

This standard specifies the mechanical and electrical characteristics of the XFM Device. Such characteristics include, among others, package dimensions, pin layout, signal assignment, power supply voltages, currents, and electrical characteristics of the PCIe interface.

Committee(s): JC-64

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WIRE BOND SHEAR TEST

 JESD22-B116B May 2017

This fully revised test provides a means for determining the strength of gold and copper ball bonds to a die or package bonding surface, and may be performed on pre-encapsulation or post-encapsulation parts. Pictures have been added to enhance the fail mode diagrams. The wire bond shear test is destructive. The test method can also be used to shear aluminum and copper wedge bonds to a die or package bonding surface. It is appropriate for use in process development, process control and/or quality assurance.

Committee(s): JC-14, JC-14.1

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Wire Bond Pull Test Methods

 JESD22-B120 Nov 2022

This test method provides a means for determining the strength and failure mode of a wire bonded to, and the corresponding interconnects on, a die or package bonding surface and may be performed on pre-encapsulation or post-encapsulation devices. 

Committee(s): JC-14, JC-14.1

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WIDE I/O SINGLE DATA RATE (WIDE I/O SDR)

 JESD229 Dec 2011

This standard defines the Wide I/O specification, including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. This standard covers the following technologies: Wide I/O. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 1 Gb through 32 Gb SDRAM (monolithic density) devices with 4, 128b wide channels using direct chip-to-chip attach methods between 1 to 4 memory devices and a controller device.

Committee(s): JC-42, JC-42.6

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WIDE I/O 2 (WideIO2)

 JESD229-2 Aug 2014

This standard defines Wide I/O 2 (WideIO2), including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 8 Gb through 32 Gb SDRAM devices with 4 or 8 64-bit wide channels using direct chip-to-chip attach methods for between 1 and 4 memory devices and a controller/buffer device. The WideIO2 architecture is an evolution of the WIO architecture to enable bandwidth scaling with capacity.

Committee(s): JC-42.6

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VOLTAGE REGULATOR DIODE NOISE VOLTAGE MEASUREMENT

Status: Reaffirmed January 1992, April 1999, April 2002 		JESD307 May 1965

This standard is intended to cover the measurement of noise voltage in voltage regulator diodes in the reverse breakdown region. It describes noise voltage measurements at specified conditions, but may be used as a guide for making such measurements at other than specified conditions. Formerly known as RS-307 and/or EIA-307

Committee(s): JC-22.4

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VIBRATION, VARIABLE FREQUENCY

 JESD22-B103B.01 Sep 2016

The Vibration, Variable Frequency Test Method is intended to determine the ability of component(s) to withstand moderate to severe vibration as a result of motion produced by transportation or filed operation of electrical equipment. This is a destructive test that is intended for component qualification. This is a minor editorial change to JESD22-B103B, June 2002 (Reaffirmed September 2010).

Committee(s): JC-14.1

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UNIVERSAL FLASH STORAGE, Version 4.0

 JESD220F Aug 2022

This document replaces all past versions, however JESD220E, January 2020 (V 3.1), is available for reference only. This standard specifies the characteristics of the UFS electrical interface and the memory device. Such characteristics include (among others) low power consumption, high data throughput, low electromagnetic interference and optimization for mass memory subsystem efficiency. The UFS electrical interface is based on an advanced differential interface by MIPI M-PHY specification which together with the MIPI UniPro specification forms the interconnect of the UFS interface.

Committee(s): JC-64.1

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UNIVERSAL FLASH STORAGE, UFS 2.2

 JESD220C-2.2 Aug 2020

The purpose of this standard is definition of a UFS Universal Flash Storage electrical interface and a UFS memory device. This standard defines a unique UFS feature set and includes the feature set of eMMC standard as a subset. This standard replaces JESD220C, UFS 2.1, and introduces a feature called WriteBooster.  Item 138.88.

Committee(s): JC-64.1

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Universal Flash Storage Host Controller Interface (UFSHCI), Version 4.0

 JESD223E Aug 2022

This standard describes a functional specification of the Host Controller Interface (HCI) for Universal Flash Storage (UFS). The objective of UFSHCI is to provide a uniform interface method of accessing the UFS hardware capabilities so that a standard/common Driver can be provided for the Host Controller. The common Driver would work with UFS host controller from any vendor. This standard includes a description of the hardware/software interface between system software and the host controller hardware. It is intended for hardware designers, system builders and software developers. This standard is a companion document to [UFS], Universal Flash Storage (UFS). The reader is assumed to be familiar with [UFS], [MIPI-UNIPRO], and [MIPI-M-PHY]. Item 206.25

Committee(s): JC-64.1

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UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), Version 3.0

Status: Superseded August 2022 by JESD223E 		JESD223D Jan 2018

This document has been superseded by JESD223E, however it is available for reference only.

Committee(s): JC-64.1

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UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), Version 2.1

Status: Supersededby JESD223D, January 2018 		JESD223C Mar 2016

This document has been superseded by JESD223D, January 2018, however is available for reference only.

Committee(s): JC-64.1

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UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), UNIFIED MEMORY EXTENSION, Version 1.1A

 JESD223-1B May 2016

This Unified Memory Extension standard is an extension to the UFSHCI standard, JESD223. The UFSHCI standard defines the interface between the UFS driver and the UFS host controller. In addition to the register interface, it defines data structures inside the system memory, which are used to exchange data, control and status information. Furthermore the UFSHCI standard defines the protocol layer structure and abstract entities within these layers. Unified Memory offers the possibility to move Device internal working memory into the system memory to reduce overall system cost and to improve Device performance. Item 203.25

Patents(): Apple: 2010/0250836; Toshiba: P2011-252001, 13/561392, 101126675, 201210272624.X, 13/758090, 101132071, 201210332970.2, P2012-194380, P2012-194380, P2012-194380; Memory Technology: 2013/0198434, 2010/0312947

Committee(s): JC-64.1

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UNIVERSAL FLASH STORAGE (UFS), Version 3.1

 JESD220E Jan 2020

This document has been superseded by JESD220F, August 2022, however is available for reference only.

Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office.

Committee(s): JC-64.1

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UNIVERSAL FLASH STORAGE (UFS), Version 3.0

Status: Superseded January 2020 		JESD220D Jan 2018

This document has been superseded by JESD220E, January 2020, however is available for reference only.

Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office.

Committee(s): JC-64.1

Available for purchase: $355.00 Add to Cart

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Universal Flash Storage (UFS), Version 2.1

Status: Superseded August 2020 		JESD220C-2.1 Mar 2016

This document has been superseded by JESD220C-2.2, August 2020, and is provided here for reference purposes only.

This standard specifies the characteristics of the UFS electrical interface and the memory device. Such characteristics include (among others) low power consumption, high data throughput, low electromagnetic interference and optimization for mass memory subsystem efficiency. The UFS electrical interface is based on an advanced differential interface by MIPI M-PHY specification which together with the MIPI UniPro specification forms the interconnect of the UFS interface. The architectural model is referencing the INCITS T10 (SCSI) SAM standard and the command protocol is based on INCITS T10 (SCSI) SPC and SBC standards. Item 133.00B

Committee(s): JC-64.1

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UNIVERSAL FLASH STORAGE (UFS) UNIFIED MEMORY EXTENSION, Version 1.1

 JESD220-1A Mar 2016

This UFS Unified Memory Support Extension standard is an extension to the UFS standard, JESD220, This standard defines a managed storage device. UFS devices are designed to offer a high performance with low power consumption. The UFS device contains features that support both high throughput for large data transfers and performance for small random data accesses. This standard describes the requirements to implement unified memory functionality in an UFS device. Unified Memory Support is not mandatory but optional. Item 133.11

Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office.

Committee(s): JC-64.1

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UNIVERSAL FLASH STORAGE (UFS) TEST

 JESD224A Jul 2017

The primary objective of this test standard is to specify the test cases for UFS device protocol conformance testing. This test standard provides test cases for checking the functions defined in the following target standard: JESD220. Universal Flash Storage (UFS) Standard version 1.1A. MIPI M-PHY and MIPI UniPro test cases are not in the scope of this document. Item 400.36

Committee(s): JC-64.5

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UNIVERSAL FLASH STORAGE (UFS) SECURITY EXTENSION

Item 112.99 		JESD225 Nov 2016

This document provides a comprehensive definition of the UFS security requirements for implementation of IEEE 1667 and TCG Opal security functionality. It also provides design guidelines and defines a tool box of macro functions and algorithms intended to reduce design-in overhead.

Committee(s): JC-64.1

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