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Title	Document #	Date
MEASUREMENT OF TRANSISTOR NOISE FIGURE AT MF, HF, AND VHF Status: ReaffirmedApril 1999, March 2009	JESD311A	Nov 1981
This standard describes a test method for measurement of transistor noise figure and effective input noise temperature at MF, HF, and VHF. This standard also adds the necessary information to make 'effective input noise temperature measurements'. This method is a revision of EIA-311 and incorporates material previously found in EIA-283, Test Method for Transistor Noise Figure Measurements at Medium Frequencies, Rescinded November 1981. Formerly known as RS-311 and/or EIA-311-A. Committee(s): JC-25 Free download. Registration or login required.
DESIGNATION SYSTEM FOR SEMICONDUCTOR DEVICES: Status: Reaffirmed November 1995, November 1999, May 2003	JESD370B	Feb 1982
This standard includes several new items and has been completely rewritten from the original EIA-370. The first is a new letter symbol C so that a JEDEC type designation may now be 2C1234, to indicate that a chip is being designated that if it were properly mounted on the package registered for the 2N1234, it would display characteristics similar to those of the 2N1234. The second major addition is the method for assigning the first numeric symbol for type designations of optoelectronic devices. ANSI/EIA-370-B-1992. Committee(s): JC-10 Free download. Registration or login required.
MEASUREMENT OF TEMPERATURE COEFFICIENT OF VOLTAGE REGULATOR DIODES: Status: ReaffirmedApril 1999, April 2002	JESD5	Feb 1982
This standard is designed to define voltage-temperature characteristic measurement techniques and a method of calculation. Although many methods could be defined, this method provides a desired uniformity and lends itself to production testing. Formerly JEDEC Suggested Standard No. 5A Committee(s): JC-22.4 Free download. Registration or login required.
LEADLESS CHIP CARRIER PINOUTS STANDARDIZED FOR LINEARS:	JESD1	Apr 1982
This standard shows how to convert existing DIP pinouts for op-amps, comparators, and D/A converters, to chip carrier packages. Committee(s): JC-41 Free download. Registration or login required.
TEST METHODS AND CHARACTER DESIGNATION FOR LIQUID CRYSTAL DEVICES:	JESD23	May 1982
This standard specifies a collection of procedures for testing and character designation of liquid crystal devices. Free download. Registration or login required.
ADDENDUM No. 7 to JESD24 - COMMUTATING DIODE SAFE OPERATING AREA TEST PROCEDURE FOR MEASURING dv/dt DURING REVERSE RECOVERY OF POWER TRANSISTORS: Status: ReaffirmedOctober 2002	JESD24- 7	Aug 1982
Defines methods for verifying the diode recovery stress capability of power transistors. Committee(s): JC-25 Free download. Registration or login required.
DIGITAL BIPOLAR LOGIC PINOUTS FOR CHIP CARRIERS:	JESD2	Dec 1982
This standard provides a chip carrier format for digital devices by defining pin functions and locations for 20, 38, 44, 52, and 68-terminal devices. Committee(s): JC-40.1 Free download. Registration or login required.
DEFINITION OF EXTERNAL CLEARANCE AND CREEPAGE DISTANCES OF DISCRETE SEMICONDUCTOR PACKAGES FOR THYRISTORS AND RECTIFIER DIODES: Status: ReaffirmedJanuary 1991, April 1999, April 2002, November 2011	JESD4	Nov 1983
This standard defines reference distances between terminals of the device and the external package at specific voltages. Committee(s): JC-22.2 Free download. Registration or login required.
LIST OF PREFERRED VALUES FOR USE ON VARIOUS TYPES OF SMALL SIGNAL AND REGULATOR DIODES Status: ReaffirmedApril 1999, April 2002	JESD482-A	Aug 1984
This standard specifies preferred values to be used on signal and regulator diodes. It will facilitate the standardization for nominal values used on small signal regulator diodes previously established in JEDEC Suggested Standard No. 2. Formerly known as EIA-482-A Committee(s): JC-22.4 Free download. Registration or login required.
CHIP CARRIER PINOUTS STANDARDIZED FOR CMOS 4000, HC AND HCT SERIES OF LOGIC CIRCUITS:	JESD11	Dec 1984
This standard indicates the procedures used to convert existing DIP and flat packages for digital parts (SSI & MSI) to chip carrier packages. Committee(s): JC-40.2 Free download. Registration or login required.
SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET):	JESD12	Jun 1985
The purpose of these benchmarks is to provide a common set of high level functions which serve as vehicles for comparing the performance of gate arrays implemented in any technology using any internal structure. These benchmarks effectively provide an unbiased measure of gate array vendors' ability to implement a desired complex function on a particular gate array at a known level of performance. Committee(s): JC-44 Free download. Registration or login required.
POWER MOSFETS:	JESD24	Jul 1985
This standard contains a listing of terms and definitions and letter symbols; a description of established procedures that are followed in the assignment of semiconductor-industry-type designations to power transistors; electrical verification test; thermal characteristics; and a user's guide. Committee(s): JC-25 Free download. Registration or login required.
ADDENDUM No. 2 to JESD12 - STANDARD FOR CELL-BASED INTEGRATED CIRCUIT BENCHMARK SET:	JESD12-2	Feb 1986
The purpose of these benchmarks is to provide a common set of high level functions that serve as vehicles for comparing the performance of cell-based ICs implemented in any technology using any internal structure. JESD12-2 extends the gate array benchmark set (JESD12) to cell-based ICs. Committee(s): JC-44 Free download. Registration or login required.
COLOR CODING OF DISCRETE SEMICONDUCTOR DEVICES Status: Reaffirmed November 1999, September 2009	JESD236-C	Mar 1986
This standard details the methods to be followed if color coding is used to identify JEDEC-assigned type numbers or for cathode identification of discrete semiconductor devices. Formerly known as EIA-236-C and/or ANSI/EIA-236-C-1986 (1995). Committee(s): JC-10 Free download. Registration or login required.
ADDENDUM No. 3 to JESD12 - CMOS GATE ARRAY MACROCELL STANDARD:	JESD12-3	Jun 1986
This standard defines a minimum set of macro cell standards for CMOS gate arrays. A total of 41 macro cell types are addressed, all of which are commonly used by gate array designers to implement Application Specific Integrated Circuits. Committee(s): JC-44 Free download. Registration or login required.
THERMAL RESISTANCE TEST METHOD FOR SIGNAL AND REGULATOR DIODES (FORWARD VOLTAGE, SWITCHING METHOD): Status: ReaffirmedApril 1999, April 2002	JESD531	Jul 1986
This standard describes a test method for measuring the thermal resistance of signal and regulator diodes. The need for modification of this test method arose out of the limited description that existed earlier for both signal and regulator diode applications in testing for thermal resistance. Previously published as ID-13. ANSI/EIA-531-1986 (July) expired June 1996. Became JESD531 after reaffirmation April 2002. Committee(s): JC-22.4 Free download. Registration or login required.
STANDARD FOR DESCRIPTION OF 54/74HCXXXX AND 54/74HCTXXXX HIGH SPEED CMOS DEVICES:	JESD7-A	Aug 1986
This standard provides uniformity, multiplicity of sources, eliminate confusion, and ease of device specification and design by users for HC, and HCT CMOS devices. This standard specifies electrical parameters. It also includes appendices listing part numbers. Committee(s): JC-40.2 Free download. Registration or login required.
SEMICONDUCTOR POWER CONTROL MODULES: Status: ReaffirmedJune 1992, April 1999, April 2002	JESD14	Nov 1986
Semiconductor Power Control Modules (SPCM) are modules consisting of thyristors or transistors, or both, as the primary controlling elements. Methods of manufacture of semiconductor power control modules include the assembling of individual components and the use of semiconductor hybrids or monolithic processing technologies, or both. Committee(s): JC-22.2 Free download. Registration or login required.
NUMBERING OF LIKE-NAMED TERMINAL FUNCTIONS IN SEMICONDUCTOR DEVICES AND DESIGNATION OF UNITS IN MULTIPLE-UNIT SEMICONDUCTOR DEVICES: Status: Reaffirmed November 1995, September 2009	JESD321-C	Feb 1987
This standard gives the system for numbering like-named electrodes or terminal functions in semiconductor devices and for assigning numerical designations to units of multiple-unit semiconductor devices. It applies to both integrated circuits and discrete devices. Formerly known as EIA-321-C and ANSI/EIA-321-C-1987. Committee(s): JC-10 Free download. Registration or login required.
ADDENDUM No. 4 to JESD12 - METHOD OF SPECIFICATION OF PERFORMANCE PARAMETERS FOR CMOS SEMICUSTOM INTEGRATED CIRCUITS:	JESD12-4	Apr 1987
This standard defines how to specify various performance parameters of semicustom ICs, including cell and interconnect propagation delays, input/output levels and capacitance, and power dissipation. Committee(s): JC-44 Free download. Registration or login required.

Standards & Documents Search

MEASUREMENT OF TRANSISTOR NOISE FIGURE AT MF, HF, AND VHF

DESIGNATION SYSTEM FOR SEMICONDUCTOR DEVICES:

MEASUREMENT OF TEMPERATURE COEFFICIENT OF VOLTAGE REGULATOR DIODES:

LEADLESS CHIP CARRIER PINOUTS STANDARDIZED FOR LINEARS:

TEST METHODS AND CHARACTER DESIGNATION FOR LIQUID CRYSTAL DEVICES:

ADDENDUM No. 7 to JESD24 - COMMUTATING DIODE SAFE OPERATING AREA TEST PROCEDURE FOR MEASURING dv/dt DURING REVERSE RECOVERY OF POWER TRANSISTORS:

DIGITAL BIPOLAR LOGIC PINOUTS FOR CHIP CARRIERS:

DEFINITION OF EXTERNAL CLEARANCE AND CREEPAGE DISTANCES OF DISCRETE SEMICONDUCTOR PACKAGES FOR THYRISTORS AND RECTIFIER DIODES:

LIST OF PREFERRED VALUES FOR USE ON VARIOUS TYPES OF SMALL SIGNAL AND REGULATOR DIODES

CHIP CARRIER PINOUTS STANDARDIZED FOR CMOS 4000, HC AND HCT SERIES OF LOGIC CIRCUITS:

SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET):

POWER MOSFETS:

ADDENDUM No. 2 to JESD12 - STANDARD FOR CELL-BASED INTEGRATED CIRCUIT BENCHMARK SET:

COLOR CODING OF DISCRETE SEMICONDUCTOR DEVICES

ADDENDUM No. 3 to JESD12 - CMOS GATE ARRAY MACROCELL STANDARD:

THERMAL RESISTANCE TEST METHOD FOR SIGNAL AND REGULATOR DIODES (FORWARD VOLTAGE, SWITCHING METHOD):

STANDARD FOR DESCRIPTION OF 54/74HCXXXX AND 54/74HCTXXXX HIGH SPEED CMOS DEVICES:

SEMICONDUCTOR POWER CONTROL MODULES:

NUMBERING OF LIKE-NAMED TERMINAL FUNCTIONS IN SEMICONDUCTOR DEVICES AND DESIGNATION OF UNITS IN MULTIPLE-UNIT SEMICONDUCTOR DEVICES:

ADDENDUM No. 4 to JESD12 - METHOD OF SPECIFICATION OF PERFORMANCE PARAMETERS FOR CMOS SEMICUSTOM INTEGRATED CIRCUITS:

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