Global Standards for the Microelectronics Industry
Standards & Documents Search
Title |
Document # | Date |
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BUS INTERCONNECT LOGIC (BIC) FOR 1.2 V |
JESD8-16A | Nov 2004 |
This standard defines the electrical parameters for high-speed interfaces for use in the 1.2V electrical environment. Included in the standard are a single ended signaling interface suitable for parallel buses, and a differential signaling interface suitable for clock applications or parallel differential buses. JEDEC BIC Standard JESD8-16A continues the tradition of the JESD8-xx standards, defining electrical interfaces for the industry as new technologies and bus requirements develop. Previously, JEDEC defined standard JESD8-6, the HSTL standard, for use in 1.5V electrical environments. BIC is similar to HSTL, except the power supply voltage has dropped from 1.5V to 1.2V, and interface requirements are tightened to allow much higher speeds Committee(s): JC-16 Free download. Registration or login required. |
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BYTE ADDRESSABLE ENERGY BACKED INTERFACE |
JESD245E | Apr 2022 |
This standard specifies the host and device interface for a DDR4 NVDIMM-N, which is a DIMM that achieves non-volatility by copying SDRAM contents into non-volatile memory (NVM) when host power is lost using an Energy Source managed by either the module or the host. This standard is used in conjunction with JESD248. Item 2233.54G Committee(s): JC-45.6 Free download. Registration or login required. |
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CERAMIC PACKAGE SPECIFICATION FOR MICROELECTRONIC PACKAGES - SUPERSEDED BY JESD9B, May 2011.Status: Rescinded, May 2011 |
JESD27 | Aug 1993 |
The intent of this standard is to be a guide in the manufacture and procurement of ceramic packages, especially for the hybrid industry. Manufacturers or ceramic packages and procuring activities for these packages will now be able to use this document as the means for agreement in the imposition of minimum requirements in qualification, screening, and quality conformance. Free download. Registration or login required. |
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CHIP CARRIER PINOUTS STANDARDIZED FOR CMOS 4000, HC AND HCT SERIES OF LOGIC CIRCUITS: |
JESD11 | Dec 1984 |
This standard indicates the procedures used to convert existing DIP and flat packages for digital parts (SSI & MSI) to chip carrier packages. Committee(s): JC-40.2 Free download. Registration or login required. |
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COLOR CODING OF DISCRETE SEMICONDUCTOR DEVICESStatus: Reaffirmed November 1999, September 2009 |
JESD236-C | Mar 1986 |
This standard details the methods to be followed if color coding is used to identify JEDEC-assigned type numbers or for cathode identification of discrete semiconductor devices. Formerly known as EIA-236-C and/or ANSI/EIA-236-C-1986 (1995). Committee(s): JC-10 Free download. Registration or login required. |
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COMMON FLASH INTERFACE (CFI): |
JESD68.01 | Sep 2003 |
The Common Flash Interface (CFI) specification outlines a device and host system software interrogation handshake that allows specific software algorithms to be used for entire families of devices. This allows device-independent, JEDEC ID-independent, and forward- and backward-compatible software support for the specific flash families. It allows flash vendors to standardize their existing interfaces for long-term compatibility. The changes for this minor revision are indicated in Annex A on page 11. Committee(s): JC-42.4 Free download. Registration or login required. |
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COMPACT THERMAL MODEL OVERVIEW |
JESD15-1.01 | Mar 2023 |
Terminology update. This document should be used in conjunction with the parent document, and is intended to function as an overview to support the effective use of Compact Thermal Model (CTM) methodologies as specified in the companion methods documents. Free download. Registration or login required. |
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COMPONENT PROBLEM ANALYSIS AND CORRECTIVE ACTION REQUIREMENTS - SUPERSEDED BY EIA-671, November 1996.Status: Superseded |
JESD43 | Nov 1996 |
Committee(s): JC-14.4 Free download. Registration or login required. |
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Compression Attached Memory Module (CAMM2) Common Standard |
JESD318A Ver. 1.10 | Nov 2024 |
This standard defines the electrical and mechanical requirements for Double Data Rate, Synchronous DRAM Compression-Attached Memory Modules (DDR5 SDRAM CAMM2s) and Low Power Double Data Rate, Synchronous DRAM Compression-Attached Memory Modules (LP5 SDRAM CAMM2s). Committee(s): JC-45 Free download. Registration or login required. |
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CONDITIONS FOR MEASUREMENT OF DIODE STATIC PARAMETERS:Status: ReaffirmedApril 1999, April 2002 (Original publication July 1965) |
JESD320-A | Dec 1992 |
This standard provides guidance for achieving equilibrium when measuring temperature sensitive static parameters of signal diodes. Formerly known as EIA-320-A. Committee(s): JC-22.4 Free download. Registration or login required. |
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