Global Standards for the Microelectronics Industry
Standards & Documents Search
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Document # | Date |
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WIRE BOND SHEAR TEST |
JESD22-B116B | May 2017 |
This fully revised test provides a means for determining the strength of gold and copper ball bonds to a die or package bonding surface, and may be performed on pre-encapsulation or post-encapsulation parts. Pictures have been added to enhance the fail mode diagrams. The wire bond shear test is destructive. The test method can also be used to shear aluminum and copper wedge bonds to a die or package bonding surface. It is appropriate for use in process development, process control and/or quality assurance. Free download. Registration or login required. |
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Wire Bond Pull Test Methods |
JESD22-B120.01 | Sep 2024 |
This test method provides a means for determining the strength and failure mode of a wire bonded to, and the corresponding interconnects on, a die or package bonding surface and may be performed on pre-encapsulation or post-encapsulation devices. Free download. Registration or login required. |
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VIBRATION, VARIABLE FREQUENCY |
JESD22-B103B.01 | Sep 2016 |
The Vibration, Variable Frequency Test Method is intended to determine the ability of component(s) to withstand moderate to severe vibration as a result of motion produced by transportation or filed operation of electrical equipment. This is a destructive test that is intended for component qualification. This is a minor editorial change to JESD22-B103B, June 2002 (Reaffirmed September 2010). Committee(s): JC-14.1 Free download. Registration or login required. |
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THERMAL SHOCK |
JESD22-A106B.02 | Jan 2023 |
This test is conducted to determine the robustness of a device to sudden exposure to extreme changes in temperature and to the effect of alternate exposures to these extremes. Free download. Registration or login required. |
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TEST METHODS TO CHARACTERIZE VOIDING IN PRE-SMT BALL GRID ARRAY PACKAGES |
JESD217A.01 | Nov 2022 |
This publication provides an overview of solder void types, outlines current metrologies and test methods used for pre-SMPT solder void characterization and potential limitations, and prescribes sampling strategy for data collection, and tolerance guidelines for corrective measures. Committee(s): JC-14.1 Free download. Registration or login required. |