Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
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Requirements for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices |
JESD625C.01 | Mar 2024 |
This standard applies to devices susceptible to damage by electrostatic discharge greater than 100 volts human body model (HBM) and 200 volts charged device model (CDM). Free download. Registration or login required. |
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PROCUREMENT STANDARD FOR KNOWN GOOD DIE (KGD) |
JESD49B.01 | Oct 2023 |
This standard facilitates the procurement and use of semiconductor die products provided in bare or bumped die form, and provides requirements and guidance to die suppliers as to the levels of as-delivered performance, quality and reliability expected. It also reflects the special needs of die product customers in terms of design and application data. Committee(s): JC-13 Free download. Registration or login required. |
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MEASUREMENT AND REPORTING OF ALPHA PARTICLE AND TERRESTRIAL COSMIC RAY INDUCED SOFT ERRORS IN SEMICONDUCTOR DEVICES |
JESD89B | Sep 2021 |
This specification defines the standard requirements and procedures for terrestrial soft-error-rate (SER) testing of integrated circuits and reporting of results. Both real-time (unaccelerated) and accelerated testing procedures are described. At terrestrial, Earth-based altitudes, the predominant sources of radiation include both cosmic-ray radiation and alpha-particle radiation from radioisotopic impurities in the package and chip materials. An overall assessment of a deviceís SER is complete, only when an unaccelerated test is done, or accelerated SER data for the alpha-particle component and the cosmic-radiation component has been obtained. Free download. Registration or login required. |
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GENERAL REQUIREMENTS FOR DISTRIBUTORS OF COMMERCIAL AND MILITARY SEMICONDUCTOR DEVICES |
JESD31F | Aug 2021 |
This standard identifies the general requirements for Distributors that supply Commercial and Military products. This standard applies to all discrete semiconductors, integrated circuits and Hybrids, whether packaged or in wafer/die form, manufactured by all Manufacturers. The requirements defined within this document are only applicable to products for which ownership remains with the Distributor or Manufacturer. Free download. Registration or login required. |
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COUNTERFEIT ELECTRONIC PARTS: NON-PROLIFERATION FOR MANUFACTURERS |
JESD243A | Jan 2021 |
This standard identifies the best commercial practices for mitigating and/or avoiding counterfeit products by all manufacturers of electronic parts including, but not limited to original component manufacturers (OCMs), authorized aftermarket manufacturers, and other companies that manufacture electronic parts under their own logo, name, or trademark. The types of product this standard applies to is limited to monolithic microcircuits, hybrid microcircuits and discrete semiconductor products. Committee(s): JC-13 Free download. Registration or login required. |
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TEST METHODS AND ACCEPTANCE PROCEDURES FOR THE EVALUATION OF POLYMERIC MATERIALS:Status: Reaffirmed May 2023 |
JESD72A | Mar 2018 |
This Test Method covers the minimum requirements that should be in effect for the evaluation and acceptance of polymeric materials for use in industrial, military, space, and other special-condition products which may require capabilities beyond standard commercial microelectronics applications. It is not the intent of this Publication to specify a material, but to evaluate the material to assure that the quality and reliability of the microelectronic devices are not compromised. This document replaces JEP105, JEP107 and JEP112. Committee(s): JC-13.5 Free download. Registration or login required. |
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ASSESSMENT OF AVERAGE OUTGOING QUALITY LEVELS IN PARTS PER MILLION (PPM) |
JESD16B | Nov 2017 |
This standard was revised to clarify assumptions necessary to estimate AOQ, revise the minimum sample size algorithm, address small sample size concerns, and provide methods for combining groups for AOQ estimation. Derivation of any new methods for combing groups for AOQ estimation. Derivation of any new methods introduced into this document have been provided in annexes. A statistical method is based on confidence interval statistics. A procedure was established for reporting AOQ when the minimum sample size criterion is not met. Not all sections of EIA-554 are appropriate for use by device manufacturers therefore JEDEC wishes to continue using JESD16. In December 2008 the formulating committee approved to remove EIA-554 (July 1996, Reaffirmed September 2002) from the JEDEC website. To obtain a copy of EIA-554 please contact GEIA at http://www.geia.org/ Committee(s): JC-13 Free download. Registration or login required. |
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TEST PROCEDURE FOR THE MANAGEMENT OF SINGLE-EVENT EFFECTS IN SEMICONDUCTOR DEVICES FROM HEAVY ION IRRADIATION: |
JESD57A | Nov 2017 |
This test method defines requirements and procedures for ground simulation and single event effects (SEE) and implementation of the method in testing integrated circuits. This standard is valid when using a cyclotron or Van de Graaff accelerator. Microcircuits under test must be delidded. The ions used at the facilities have an atomic number Z > 2. It does not apply to SEE testing that uses protons, neutrons, or other lighter particles. This standard is designed to eliminate any misunderstanding between users of the method and test facilities, to minimize delays, and to promote standardization of testing and test data. Committee(s): JC-13.4 Free download. Registration or login required. |
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INSPECTION CRITERIA FOR MICROELECTRONIC PACKAGES AND COVERSStatus: Reaffirmed May 2023 |
JESD9C | May 2017 |
The purpose of this JEDEC standard is to verify the workmanship and requirements of microelectronic packages and covers (lids) intended for use in fabricating hybrid microelectronic circuits/microcircuits (hereafter referred to as “microcircuits”). It is applicable for use by the package manufacturer (i.e., package components), and the microcircuit manufacturer (i.e., from incoming inspection of package components through final inspection of the completed microcircuit). This standard also encompasses and replaces JESD27, Ceramic Package Specification for Microelectronic Packages. It is meant to be used in conjunction, and to not contradict, with MIL-STD-883, Test Method 2009: External Visual. Free download. Registration or login required. |
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STANDARD TEST METHOD UTILIZING X-RAY FLUORESCENCE (XRF) FOR ANALYZING COMPONENT FINISHES AND SOLDER ALLOYS TO DETERMINE TIN (Sn) - LEAD (Pb) CONTENTReaffirmed June 2023 |
JESD213A | Apr 2017 |
This document is intended to be used by Original Component Manufacturers who deliver electronic components and Original Equipment Manufacturers who are the platform system integrators. It is intended to be applied prior to delivery by the OCMs and may be used by OEM system engineers and procuring activities as well as U.S Government Department of Defense system engineers, procuring activities and repair centers. This Standard establishes the instrumentation, techniques, criteria, and methods to be utilized to quantify the amount of Lead (Pb) in Tin-Lead (Sn/Pb) alloys and electroplated finishes containing at least 3 weight percent (wt%) Lead (Pb) using X-Ray Fluorescence (XRF) equipment. Reaffirmed June 2023
Committee(s): JC-13 Free download. Registration or login required. |