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Title	Document #	Date
Automotive Solid State Drive (SSD) Device Standard Release Number: 1.1	JESD312	Jan 2025
This standard defines the specifications of interface parameters, signaling protocols, environmental requirements, packaging, and other features for a solid state drive (SSD) targeted primarily at automotive applications. Committee(s): JC-64, JC-64.8 Free download. Registration or login required.
Guidelines for Representing Threshold Voltage of SiC MOSFETs in Datasheets, Version 1.0 Release Number: Version 1.0	JEP202	Jan 2025
This publication provides guidelines for representation of threshold voltage and transfer characteristic of SiC MOS device in datasheets. Committee(s): JC-70, JC-70.2 Free download. Registration or login required.
PLASTIC BOTTOM GRID ARRAY, BALL, 0.35 MM PITCH, RECTANGULAR FAMILY PACKAGE	MO-365A	Jan 2025
Designator: PBGA-B#[#]_i0P35... Item: 11-1076 Committee(s): JC-11 JEP95 Registrations Main Page Free download. Registration or login required.
Universal Flash Storage (UFS) Release Number: Version 4.1	JESD220G	Dec 2024
This document replaces all prior versions; however, JESD220F August 2022 (version 4.0) remains available for reference purposes. This standard defines a UFS Universal Flash Storage electrical interface and a UFS memory device. Committee(s): JC-64, JC-64.1 Available for purchase: $423.00 Add to Cart To help cover the costs of producing standards, JEDEC is now charging for non-member access to selected standards and design files. Most of the content on this site remains free to download with registration. Paying JEDEC member companies enjoy free access to all content. Learn more and apply today. Paying JEDEC Members may login for free access.
Universal Flash Storage Host Controller Interface (UFSHCI) Release Number: Version 4.1	JESD223F	Dec 2024
This document replaces all prior versions; however, JESD223E August 2022 (version 4.0) remains available for reference purposes. This standard describes a functional specification of the Host Controller Interface (HCI) for Universal Flash Storage (UFS). The objective of UFSHCI is to provide a uniform interface method of accessing the UFS hardware capabilities so that a standard/common Driver can be provided for the Host Controller. The common Driver would work with UFS host controller from any vendor. This standard includes a description of the hardware/software interface between system software and the host controller hardware. It is intended for hardware designers, system builders and software developers. This standard is a companion document to [UFS], Universal Flash Storage (UFS). The reader is assumed to be familiar with [UFS], [MIPI-UNIPRO], and [MIPI-M-PHY]. Clause 4 provides a brief overview of the architectural overview of UFS. Clause 5 describes the register interface of UFSHCI. Clause 6 describes the data structure used by UFSHCI. Clause 7 provides a theory of operation for UFSHCI. Clause 8 describes the error recovery process for UFSHCI. Committee(s): JC-64, JC-64.1 Available for purchase: $220.00 Add to Cart Paying JEDEC Members may login for free access.
DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card C Annex Release Number: Version 1.00	JESD323-A0-RCC	Dec 2024
This standard, “JESD323-A0-RCC, “DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card C Annex” defines the design detail of x16, 1 Package Ranks DDR5 Clocked UDIMM. Committee(s): JC-45, JC-45.3 Free download. Registration or login required.
LPDDR5 CAMM2, 1.38 MM X 1.00 MM PITCH MICROELECTRONIC ASSEMBLY	MO-357D	Nov 2024
Designator: XBMA-H736_I1p0_R78p0x23p0Z2p6 Item #: 11.14-232 Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
PLASTIC DUAL UPPER TO BOTTOM, 1.38 MM X1.00 MM PITCH CONNECTOR (CMT)	SO-032D	Nov 2024
Designator: SO-032D_PDUtBXC-H736_I1p0-R17p15x78p0Z1p05 Item: 14-231 Cross Reference: N/A Patents(): Patent NO: 9,425,525 Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
DDR5 DIMM Labels	JESD401-5C	Nov 2024
This standard defines the labels that shall be applied to all DDR5 memory modules to fully describe the key attributes of the module. The label can be in the form of a stick-on label, silk screened onto the assembly, or marked using an alternate customer-readable format. A readable point size should be used, and the number can be printed in one or more rows on the label. Hyphens may be dropped when lines are split, or when font changes sufficiently. Committee(s): JC-45 Free download. Registration or login required.
288 TERM DDR5 DIMM, 0.85 MM PITCH, MICROELECTRONIC ASSEMBLY	MO-329I	Nov 2024
Designator: PDMA-N288-I0p85-R136p8x5p57Z31p8R2p55x0p6 Item: 14-230 Cross Reference: MO-329, SO-023, GS-010 Patents(): Micron: US7,547,213. Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.

Standards & Documents Search

Automotive Solid State Drive (SSD) Device Standard

Guidelines for Representing Threshold Voltage of SiC MOSFETs in Datasheets, Version 1.0

PLASTIC BOTTOM GRID ARRAY, BALL, 0.35 MM PITCH, RECTANGULAR FAMILY PACKAGE

Universal Flash Storage (UFS)

Universal Flash Storage Host Controller Interface (UFSHCI)

DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card C Annex

LPDDR5 CAMM2, 1.38 MM X 1.00 MM PITCH MICROELECTRONIC ASSEMBLY

PLASTIC DUAL UPPER TO BOTTOM, 1.38 MM X1.00 MM PITCH CONNECTOR (CMT)

DDR5 DIMM Labels

288 TERM DDR5 DIMM, 0.85 MM PITCH, MICROELECTRONIC ASSEMBLY

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