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Title	Document #	Date
DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card C Annex Release Number: Version 1.00	JESD323-A0-RCC	Dec 2024
This standard, “JESD323-A0-RCC, “DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card C Annex” defines the design detail of x16, 1 Package Ranks DDR5 Clocked UDIMM. Committee(s): JC-45, JC-45.3 Free download. Registration or login required.
LPDDR5 CAMM2, 1.38 MM X 1.00 MM PITCH MICROELECTRONIC ASSEMBLY	MO-357D	Nov 2024
Designator: XBMA-H736_I1p0_R78p0x23p0Z2p6 Item #: 11.14-232 Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
PLASTIC DUAL UPPER TO BOTTOM, 1.38 MM X1.00 MM PITCH CONNECTOR (CMT)	SO-032D	Nov 2024
Designator: SO-032D_PDUtBXC-H736_I1p0-R17p15x78p0Z1p05 Item: 14-231 Cross Reference: N/A Patents(): Patent NO: 9,425,525 Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
DDR5 DIMM Labels	JESD401-5C	Nov 2024
This standard defines the labels that shall be applied to all DDR5 memory modules to fully describe the key attributes of the module. The label can be in the form of a stick-on label, silk screened onto the assembly, or marked using an alternate customer-readable format. A readable point size should be used, and the number can be printed in one or more rows on the label. Hyphens may be dropped when lines are split, or when font changes sufficiently. Committee(s): JC-45 Free download. Registration or login required.
288 TERM DDR5 DIMM, 0.85 MM PITCH, MICROELECTRONIC ASSEMBLY	MO-329I	Nov 2024
Designator: PDMA-N288-I0p85-R136p8x5p57Z31p8R2p55x0p6 Item: 14-230 Cross Reference: MO-329, SO-023, GS-010 Patents(): Micron: US7,547,213. Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
SILICON BOTTOM GRID ARRAY COLUMN, 0.035 MM X 0.055 MM PITCH RECTANGULAR PACKAGE	MO-362A	Nov 2024
Designator: SBGA-M16148[49588]_D0p068... Item #: 4-1056 Committee(s): JC-11 JEP95 Registrations Main Page Free download. Registration or login required.
Compression Attached Memory Module (CAMM2) Common Standard	JESD318A Ver. 1.10	Nov 2024
This standard defines the electrical and mechanical requirements for Double Data Rate, Synchronous DRAM Compression-Attached Memory Modules (DDR5 SDRAM CAMM2s) and Low Power Double Data Rate, Synchronous DRAM Compression-Attached Memory Modules (LP5 SDRAM CAMM2s). Committee(s): JC-45 Free download. Registration or login required.
LPDDR5/5X Compression Attached Memory Module (CAMM2) Raw Card E Annex Release Number: Version 1.00	JESD318-F0-RCE	Nov 2024
This standard, JESD318-F0-RCE, “LPDDR5/5X Compression Attached Memory Module (CAMM2) Raw Card E Annex”, defines the design detail of eight x16 subchannels from four 315-ball dual channel LPDDR5/5x devices. Committee(s): JC-45 Free download. Registration or login required.
DDR5 Clocked Small Outline Dual Inline Memory Module (CSODIMM) Raw Card A Annex Release Number: Version 1.00	JESD324-V0-RCA	Nov 2024
This standard, JESD324-V0-RCA, “DDR5 Clocked Small Outline Dual Inline Memory Module (CSODIMM) Raw Card A Annex” defines the design detail of x8, 1 Package Ranks DDR5 CSODIMM with Clock Driver. Committee(s): JC-45, JC-45.3 Free download. Registration or login required.
DDR5 Clocked Unbuffered Dual Inline Memory Module with 4-bit ECC Release Number: Version 1.00	JESD323-B4-RCD	Nov 2024
This standard, JESD323-B4-RCD, “DDR5 Clocked Unbuffered Dual Inline Memory Module with 4-bit ECC (EC4 CUDIMM) Raw Card D Annex” defines the design detail of x8, 1 Package Rank DDR5 ECC CUDIMM with Clock Driver. Committee(s): JC-45, JC-45.3 Free download. Registration or login required.
DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card A Annex Release Number: Version 1.00	JESD323-A0-RCA	Nov 2024
This standard, JESD323-A0-RCA, “DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card A Annex” defines the design detail of x8, 1 Package Rank DDR5 NECC CUDIMM with Clock Driver. Committee(s): JC-45, JC-45.3
DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card A Annex Release Number: Version 1.00	JESD323-A0-RCA	Nov 2024
This standard, JESD323-A0-RCA, “DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card A Annex” defines the design detail of x8, 1 Package Rank DDR5 NECC CUDIMM with Clock Driver. Committee(s): JC-45, JC-45.3 Free download. Registration or login required.
DDR5 Clocked Small Outline Dual Inline Memory Module with 4-bit ECC (EC4 CSODIMM) Raw Card D Annex Release Number: Version 1.00	JESD324-W4-RCD	Nov 2024
This standard, JESD324-W4-RCD, “DDR5 Clocked Small Outline Dual Inline Memory Module with 4-bit ECC (EC4 CSODIMM) Raw Card D Annex” defines the design detail of x8, 1 Package Ranks DDR5 CSODIMM with Clock Driver. Committee(s): JC-45.3 Free download. Registration or login required.
PART MODEL SCHEMAS	JEP30-10v7-0-0	Nov 2024
This download includes all files under the parent schema JEP30-10v7-0-0 (Committees: JC-11, JC-11.2) including: JEP30-A101v2-0-3 (Assembly Process), Committees: JC-11, JC-11.2, JC-14 JEP30-E101v4-1-0 (Electrical), Committees: JC-11, JC-11.2, JC-16 JEP30-P101v7-0-0 (Package), Committees: JC-11, JC-11.2 JEP30-S101v1-1-0 (Supply Chain), Committees: JC-11, JC-11.2, JC-14 JEP30-T101v2-0-3 (Thermal) Committees: JC-11, JC-11.2, JC-15 JEP30-D10v4-0-0 (Types Dictionary) Committees: JC-11, JC-11.2 This will enable the user to validate the schemas. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-14, JC-15, JC-16 Free download. Registration or login required.
Part Model Supply Chain Guidelines for Electronic-Device Packages – XML Requirements	JEP30-S100A.01	Nov 2024
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, supply chain, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the SupplyChain sub-section of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-14.4 Free download. Registration or login required.
Part Model Package Guidelines for Electronic-Device Packages – XML Requirements	JEP30-P100F	Nov 2024
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the "Package" subsection of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2 Free download. Registration or login required.
Part Model Electrical Guidelines for Electronic-Device Packages – XML Requirements	JEP30-E100F	Nov 2024
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, Electrical, assembly process classification data along with materials and substances that may be present in the supplied product or subproducts. This Guideline specifically focuses on the “Electrical” sub-section of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-16 Free download. Registration or login required.
Descriptive Designation System for Electronic-device Packages and Footprints	JESD30N	Nov 2024
This standard establishes requirements for the generation of electronic-device package designators for JEDEC. Committee(s): JC-11, JC-11.2 Free download. Registration or login required.
DDR5 Clocked Small Outline Dual Inline Memory Module (CSODIMM) Raw Card C Annex Release Number: Version 1.00	JESD324-V0-RCC	Nov 2024
This standard, JESD324-V0-RCC, "DDR5 Clocked Small Outline Dual Inline Memory Module (CSODIMM) RawCard C Annex" defines the design detail of x16, 1 Package Ranks DDR5 CSODIMM with Clock Driver. Committee(s): JC-45.3 Free download. Registration or login required.
Serial Flash Discoverable Parameters (SFDP)	JESD216G	Nov 2024
The SFDP standard defines the structure of the SFDP database within the memory device and methods used to read its data. Committee(s): JC-42.4 Free download. Registration or login required.

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