Global Standards for the Microelectronics Industry
Standards & Documents Search
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Document # | Date |
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48 Lead, Very, Very Thin Small Outline Package, Type 1. WR-PDSO1, WSOP1. Item 11.11-701. |
MO-259-A | Mar 2005 |
Free download. Registration or login required. |
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ACCEPTED PRACTICES FOR MAKING MICROELECTRONIC DEVICE THERMAL CHARACTERISTICS TESTSStatus: Rescinded |
JEB20 | Jan 1975 |
Committee(s): JC-11 |
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ANNUAL UPDATING SERVICE: |
JEP95 AUS | Jan 2000 |
Subscription to this updating service is available from the JEDEC Office. New outlines are shipped to subscribers for insertion into the appropriate sections of Publication No. 95. JEP95 and Updating Service can be ordered through JEDEC at (703)907-7540 or ptanner@jedec.org. Committee(s): JC-11 |
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DDR4 260 Pin SODIMM Connector Performance Standard |
PS-003A.01 | Jul 2016 |
This standard defines the form, fit and function of SODIMM DDR4 connectors for modules supporting channels with transfer rates as high as 3.2 GT/S. It contains mechanical, electrical and reliability requirements for a one-piece connector mated to a module with nominal thickness of 1.20 mm. The intent of this document is to provide Performance Standards to enable connector, system designers and manufacturers to build, qualify and use the SODIMM DDR4 connectors in client and server platforms. Item 11.14-179E Patents(): FOXCONN US PATENT NO.: 5,882,211; 6,126,472; 6,113,398 Committee(s): JC-11.14 Free download. Registration or login required. |
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DESCRIPTIVE DESIGNATION SYSTEM FOR ELECTRONIC-DEVICE PACKAGES |
JESD30J | Nov 2022 |
This standard establishes requirements for the generation of electronic-device package designators for the JEDEC Solid State Technology Association. The requirements herein are intended to ensure that such designators are presented in as uniform a manner as practicable. Item 11.2-1002. Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Ball Grid Array (BGA)Package Measuring and Methodology. |
DG-4.17C | Jul 2008 |
Item 11.2-791(S) Free download. Registration or login required. |
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Design Requirements - Ball Grid Array Package (BGA) |
DR-4.14J.01 | Feb 2019 |
Item 11.2-948E Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Ball Grid Array Package (BGA) |
DR-4.27F.01 | Nov 2018 |
Ball Pitch = 0.65, 0.75 and 0.80 mm, Body sizes >21mm. (For body sizes ≤ 21mm see Design Registration 4.5) Item 11.2-969E. Editorial Change Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Ball Grid Array Package (BGA) and Interstitial Ball Grid Array Package (IBGA) |
DR-4.5N.01 | Nov 2018 |
Ball Pitch = 0.40, 0.50, 0.65, 0.75 and 0.80 mm. Body sizes = ≤ 21 mm.Item 11.2-968E, Editorial Change. Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Die-Size Ball Grid Array Packages (DSBGA) Design Guide. |
DG-4.7F | Jan 2014 |
Item 11.2-829R Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Fine pitch, Rectangular Ball Grid Array Packages (FRBGA).Status: RescindedFebruary 2015 |
DR-4.6D.01 | Jul 2012 |
This outline has been replaced by Design Registration 4.5J and Design Registration 4.27C. |
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Design Requirements - Fine-Pitch, Land Grid Array Package, Square and Rectangular (FLGA, FRLGA) |
DG-4.25B | Aug 2016 |
This Design Requirement defines the symbols, definitions, algorithms, and specified dimensions and tolerances for Fine-pitch, LGA packages. The guidelines defined are based on hard metric dimensions and adhere to the geometric dimensioning and tolerancing principles defined in ASME Y14.5M-1994. Item 11.2-896(S) Free download. Registration or login required. |
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Design Requirements - Fine-pitch, Square Ball Grid Array Package (FBGA) Package-on-Package (PoP). |
DR-4.22C.02 | Mar 2011 |
Item 11.2-839(R) Free download. Registration or login required. |
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Design Requirements - General Requirements |
DG-4.2 | Jan 1980 |
Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Generic Matrix Tray for Handling and Shipping (Low Stacking Profile for BGA Packages). |
DG-4.9A | Mar 2000 |
Item 11.2-539S Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Generic Matrix Tray for Handling and Shipping, includes addition of optional side-wall bar code feature. |
DG-4.10D | Oct 2002 |
Item 11.2-615s Free download. Registration or login required. |
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Design Requirements - Internal Stacking Module, Land Grid Array Packages with External Interconnect Terminals (ISM). |
DG-4.21A | Feb 2007 |
Item 11.2-699(S) Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Metric Small Outline J-Leaded Package Design Guide |
DG-4.13 | Aug 1996 |
Free download. Registration or login required. |
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Design Requirements - Micropillar Grid Array (MPGA) |
DR-4.26B | Nov 2015 |
Item 11.2-845(R) Free download. Registration or login required. |
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Design Requirements - Plastic Quad and Dual Inline, Square and Rectangular, No-Lead Packages (with Optional Thermal Enhancements). QFP-N/SO-N. |
DG-4.8C | Sep 2006 |
Item 11.2-713(s) Free download. Registration or login required. |