Global Standards for the Microelectronics Industry
Standards & Documents Search
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Document # | Date |
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288 TERM DDR5 DIMM, 0.85 MM PITCH, MICROELECTRONIC ASSEMBLY |
MO-329I | Nov 2024 |
Designator: PDMA-N288-I0p85-R136p8x5p57Z31p8R2p55x0p6 Item: 14-230 Cross Reference: MO-329, SO-023, GS-010
Patents(): Micron: US7,547,213. Free download. Registration or login required. |
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288 TERMINAL POSITIONS (287 TERMINALS) DDR5 DIMM SMT 0.85MM PITCH SOCKET |
SO-023E | Feb 2025 |
Designator: PDXC-LO288-I0p85-R162p0x6p5Z21p3-N5p20S3p1Z0p2 Item: 11.14-233, Access STP Files for SO-023C Cross Reference: MO-329, GS-010C
Patents(): CN 202759077 U Free download. Registration or login required. |
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48 Lead, Very, Very Thin Small Outline Package, Type 1. WR-PDSO1, WSOP1. Item 11.11-701. |
MO-259-A | Mar 2005 |
Free download. Registration or login required. |
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ACCEPTED PRACTICES FOR MAKING MICROELECTRONIC DEVICE THERMAL CHARACTERISTICS TESTSStatus: Rescinded |
JEB20 | Jan 1975 |
Committee(s): JC-11 |
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ANNUAL UPDATING SERVICE: |
JEP95 AUS | Jan 2000 |
Subscription to this updating service is available from the JEDEC Office. New outlines are shipped to subscribers for insertion into the appropriate sections of Publication No. 95. JEP95 and Updating Service can be ordered through JEDEC at (703)907-7540 or ptanner@jedec.org. Committee(s): JC-11 |
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DDR4 260 Pin SODIMM Connector Performance Standard |
PS-003A.01 | Jul 2016 |
This standard defines the form, fit and function of SODIMM DDR4 connectors for modules supporting channels with transfer rates as high as 3.2 GT/S. It contains mechanical, electrical and reliability requirements for a one-piece connector mated to a module with nominal thickness of 1.20 mm. The intent of this document is to provide Performance Standards to enable connector, system designers and manufacturers to build, qualify and use the SODIMM DDR4 connectors in client and server platforms. Item 11.14-179E Patents(): FOXCONN US PATENT NO.: 5,882,211; 6,126,472; 6,113,398 Committee(s): JC-11.14 Free download. Registration or login required. |
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DDR5 262 Pin SODIMM Connector Performance Standard |
PS-006B | Sep 2024 |
This standard defines the form, fit and function of SODIMM DDR5 connectors for modules supporting channels with transfer rates 6.4 GT/S and beyond. It contains mechanical, electrical and reliability requirements for a one-piece connector mated to a module with nominal thickness of 1.20 mm. The intent of this document is to provide performance standards to enable connector, system designers and manufacturers to build, qualify and use the SODIMM DDR5 connectors in client and server platforms. Item 14-226 Free download. Registration or login required. |
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DDR5 CAMM2, 1.00 MM X 1.38 MM PITCH, MICROELECTRONIC ASSEMBLY |
MO-358B | Jun 2024 |
Designator: XBNA-N#_I1p0_... Item No: 14-229 Free download. Registration or login required. |
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Descriptive Designation System for Electronic-device Packages and Footprints |
JESD30O | Feb 2025 |
This standard establishes requirements for the generation of electronic-device package designators for JEDEC. Free download. Registration or login required. |
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DESIGN GUIDE 4.10, GENERIC SHIPPING & HANDLING MATRIX TRAY |
DG-4.10E | Feb 2025 |
Item 102-1029S Free download. Registration or login required. |
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Design Requirements - Ball Grid Array (BGA)Package Measuring and Methodology. |
DG-4.17C | Jul 2008 |
Item 11.2-791(S) Free download. Registration or login required. |
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Design Requirements - Ball Grid Array Package (BGA) |
DR-4.14J.01 | Feb 2019 |
Item 11.2-948E Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Ball Grid Array Package (BGA) |
DR-4.27F.01 | Nov 2018 |
Ball Pitch = 0.65, 0.75 and 0.80 mm, Body sizes >21mm. (For body sizes ≤ 21mm see Design Registration 4.5) Item 11.2-969E. Editorial Change Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - BALL GRID ARRAY PACKAGE BALL PITCH ≤ 0.80 MM BODY SIZES ≤ 21 MM |
DR-4.50 | Nov 2023 |
BALL GRID ARRAY PACKAGE Item 2-1038 Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Die-Size Ball Grid Array Packages (DSBGA) Design Guide. |
DG-4.7F | Jan 2014 |
Item 11.2-829R Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Fine pitch, Rectangular Ball Grid Array Packages (FRBGA).Status: RescindedFebruary 2015 |
DR-4.6D.01 | Jul 2012 |
This outline has been replaced by Design Registration 4.5J and Design Registration 4.27C. Item 11.2-838(S), 11-893R, 11-894R |
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Design Requirements - Fine-Pitch, Land Grid Array Package, Square and Rectangular (FLGA, FRLGA) |
DG-4.25B | Aug 2016 |
This Design Requirement defines the symbols, definitions, algorithms, and specified dimensions and tolerances for Fine-pitch, LGA packages. The guidelines defined are based on hard metric dimensions and adhere to the geometric dimensioning and tolerancing principles defined in ASME Y14.5M-1994. Item 11.2-896(S) Free download. Registration or login required. |
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Design Requirements - Fine-pitch, Square Ball Grid Array Package (FBGA) Package-on-Package (PoP). |
DR-4.22C.02 | Mar 2011 |
Item 11.2-839(R) Free download. Registration or login required. |
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Design Requirements - General Requirements |
DG-4.2 | Jan 1980 |
Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Generic Matrix Tray for Handling and Shipping (Low Stacking Profile for BGA Packages). |
DG-4.9A | Mar 2000 |
Item 11.2-539S Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Internal Stacking Module, Land Grid Array Packages with External Interconnect Terminals (ISM). |
DG-4.21A | Feb 2007 |
Item 11.2-699(S) Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Metric Small Outline J-Leaded Package Design Guide |
DG-4.13 | Aug 1996 |
Free download. Registration or login required. |
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Design Requirements - Micropillar Grid Array (MPGA) |
DR-4.26B | Nov 2015 |
Item 11.2-845(R) Free download. Registration or login required. |
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Design Requirements - Plastic Quad and Dual Inline, Square and Rectangular, No-Lead Packages (with Optional Thermal Enhancements). QFP-N/SO-N. |
DG-4.8C | Sep 2006 |
Item 11.2-713(s) Free download. Registration or login required. |
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Design Requirements - Plastic Ultra-Thin Small outline No-Lead Package. R-PDSO-N/USON. |
DG-4.16A | Feb 1998 |
Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Punch-Singulated, Fine Pitch, Square, Very Thin and Very Very Thin Profile, Leadframe-Based Quad No-Lead Staggared Dual-Row Packages, (with optional Thermal Enhancements) QFN. |
DG-4.23A | Nov 2005 |
Item 11.2-728(S) Free download. Registration or login required. |
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Design Requirements - Quad Flatpack |
DG-4.4A | Jun 2000 |
Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Quad No-Lead Staggered and Inline Multi-Row Packages (with optional thermal enhancements). QFN. |
DG-4.19D | May 2007 |
Item 11.2-765(s) Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Scalable Quad Flat No-lead Packages, Square and Rectangular (Scalable QFN) |
DG-4.24B | Aug 2016 |
Item 11.2-850(S) Committee(s): JC-11 Free download. Registration or login required. |
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Design Requirements - Small Scale Plastic Quad and Dual Inline, Square and Rectangular, No-Lead Packages (With Optional Thermal Enhancements). Small Scale (QFN/SON). |
DG-4.20F | Sep 2016 |
Item 11.2-820(S) Free download. Registration or login required. |
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Design Requirements - Thin Small Outline Package, TSOP - Type 2. |
DG-4.15B | May 2004 |
Item 11.2-675(s) Committee(s): JC-11.2 Free download. Registration or login required. |
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Design Requirements - Wafer Level Ball Grid Arrays (WLBGA). |
DR-4.18A.01 | Apr 2021 |
Item 11.2-965(E) Free download. Registration or login required. |
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DESIGN REQUIRMENTS FOR OUTLINES OF SOLID STATE AND RELATED PRODUCTS: DISCONTINUED AS A SEPARATE ITEM. NOW CONTAINED IN JEP95, BOOK 1, SECTION 4.Status: Incorporated |
JESD95-1 | Jan 2000 |
Committee(s): JC-11 |
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JEDEC REGISTERED AND STANDARD OUTLINES FOR SOLID STATE AND RELATED PRODUCTS: |
JEP95 | Jan 2000 |
This publication is a compilation of some 1800 pages of outline drawings for microelectronic packages including transistors, diodes, DIPS, chip carriers and package interface BGA outlines in both inch and metric versions. Committee(s): JC-11 |
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JEP95 Registrations Main Page |
JEP95 Index | Apr 2001 |
This page will provide a link to the Master Index for JEP95. It also provides a link to 'index by device type' as well as the table of contents for each section within JEP95. For older outlines that have been archived, they can be accessed through this page. Committee(s): JC-11 |
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LPDDR5 CAMM2 Connector Performance Standard |
PS-007A | Jul 2024 |
LPDDR5 CAMM2 Connector Performance Standard Free download. Registration or login required. |
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LPDDR5 CAMM2, 1.38 MM X 1.00 MM PITCH MICROELECTRONIC ASSEMBLY |
MO-357D | Nov 2024 |
Designator: XBMA-H736_I1p0_R78p0x23p0Z2p6 Item #: 11.14-232 Free download. Registration or login required. |
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Part Model Assembly Process Classification Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-A100B.01 | Feb 2025 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or subproducts. This Guideline specifically focuses on the “Assembly Process Classification” subsection of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-14.4 Free download. Registration or login required. |
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Part Model Electrical Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-E100G | Feb 2025 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, Electrical, assembly process classification data along with materials and substances that may be present in the supplied product or subproducts. This Guideline specifically focuses on the “Electrical” sub-section of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-16 Free download. Registration or login required. |
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Part Model Guidelines for Electronic-Device Packages – XML Requirements |
JEP30F | Feb 2025 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It covers several sub-sections such as electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the parental structure, under which several sub-section listed above, can be contained and linked together within the Part Model parent structure. For more information visit the main JEP30 webpage. Free download. Registration or login required. |