Global Standards for the Microelectronics Industry
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Title | Document # |
Date![]() |
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MASTER TRACE FOR 128 GB SSD |
JESD219A_MT | Jul 2012 |
The Master Trace file is a supporting file for implementation of the endurance verification client workload and is used in conjunction with JESD219A. This Master Trace represents actual SSD activity over a period of seven months. It is used as the client workload for endurance verification per JESD218 of SSDs with user capacities greater than or equal to 64 GB. This Master Trace may be used as the Test Trace for endurance verification of a 128 GB to 256 GB SSD with its existing LBA range. This Master trace may be compressed or expanded to be used with capacities less than 128 GB or greater than 256 GB, respectively. The compressed or expanded Test Trace shall be applicable to SSDs with a maximum LBA that is less than or equal to 2x the maximum LBA of the Test Trace (e.g., a user capacity from 1x to 2x of the Test Trace capacity supported). Committee(s): JC-64.8 Free download. Registration or login required. |
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TEST TRACE FOR 64 GB - 128 GB SSD |
JESD219A_TT | Jul 2012 |
The Test Trace file is a supporting file for implementation of the endurance verification client workload and is used in conjunction with JESD219A. This Test Trace is derived from the 128 GB Master Trace using the compression method described in JESD219 to enable testing on SSDs with a capacity range of 64 GB to 128 GB. All characteristics of this Test Trace are identical to the Master Trace except that the maximum LBA represents an SSD user capacity of 64 GB. Committee(s): JC-64.8 Free download. Registration or login required. |
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Universal Flash Storage (UFS), Version 2.1Status: Superseded August 2020 |
JESD220C-2.1 | Mar 2016 |
This document has been superseded by JESD220C-2.2, August 2020, and is provided here for reference purposes only. This standard specifies the characteristics of the UFS electrical interface and the memory device. Such characteristics include (among others) low power consumption, high data throughput, low electromagnetic interference and optimization for mass memory subsystem efficiency. The UFS electrical interface is based on an advanced differential interface by MIPI M-PHY specification which together with the MIPI UniPro specification forms the interconnect of the UFS interface. The architectural model is referencing the INCITS T10 (SCSI) SAM standard and the command protocol is based on INCITS T10 (SCSI) SPC and SBC standards. Item 133.00B Committee(s): JC-64.1 Free download. Registration or login required. |
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UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), Version 2.1Status: Supersededby JESD223D, January 2018 |
JESD223C | Mar 2016 |
This document has been superseded by JESD223D, January 2018, however is available for reference only. Committee(s): JC-64.1 Free download. Registration or login required. |
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UNIVERSAL FLASH STORAGE (UFS) UNIFIED MEMORY EXTENSION, Version 1.1 |
JESD220-1A | Mar 2016 |
This UFS Unified Memory Support Extension standard is an extension to the UFS standard, JESD220, This standard defines a managed storage device. UFS devices are designed to offer a high performance with low power consumption. The UFS device contains features that support both high throughput for large data transfers and performance for small random data accesses. This standard describes the requirements to implement unified memory functionality in an UFS device. Unified Memory Support is not mandatory but optional. Item 133.11 Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s): JC-64.1 Free download. Registration or login required. |