Global Standards for the Microelectronics Industry
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Document # | Date |
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SPD General Standard. |
SPD4.1.2 | Jul 2008 |
Release No. 19. Item 2065.26 Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 6Release Number: 30 |
SPD4.1.2.L-6 | Nov 2020 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 6. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01H. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 5Release Number: 29 |
SPD4.1.2.L-5 | Aug 2019 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 5. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2276.05. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 3Release Number: 25 |
SPD4.1.2.L-3 | Sep 2015 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. The following SPD fields will be documented in the order presented in section 1.1 with the exception of bytes 128~255 which are documented in separate annexes, one for each family of module types. Further description of Byte 2 is found in Annex A of the SPD standard. Item 2220.01F. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 2Release Number: 23A |
SPD4.1.2.L-2 | Jan 2014 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 2. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. (This release is editorial changes only). Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 1Release Number: 23 |
SPD4.1.2.L-1 | Nov 2013 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 1. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01 Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L, Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 4Release Number: 27A |
SPD4.1.2.L-4 | Aug 2019 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 4. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01G. This is an editorial revision to the publication in January 2017. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex K - Serial Presence Detect (SPD) for DDR3 SDRAM Modules, Release 6 |
SPD4.1.2.11 | Feb 2014 |
Release No. 24. Item 2065.47A Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex J: Serial Presence Detect for DDR2 SDRAM |
SPD4.1.2.10 | Jan 2007 |
Release No. 17 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex G, Serial Presence Detect for FBDIMM, Revision 1.1 |
SPD4.1.2.7 | Jun 2006 |
Release No. 16A. Item 2003.02A Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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R/C U, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification |
MODULE4.20.20.U | Sep 2012 |
Release 22. Item 2145.37 Committee(s): JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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R/C M, in 240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification |
MODULE4.20.23.M | Jan 2013 |
Release No. 22 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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R/C AD, in 240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification |
MODULE4.20.23.AD | Jan 2013 |
Release No. 22 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PRELIMINARY RELEASE FOR JESD21: DDR3 MINI-UDIMM RC F0(x8 2R, STACKED) |
PRN13-NM1 | Oct 2013 |
Item No. 2229.01 (JC-45.3-11-523, JCB-11-102) Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PRELIMINARY RELEASE FOR JESD21: DDR3 MINI-RDIMM ANNEX D (x8 2R, Planar) |
PRN13-NM3 | Oct 2013 |
Item No. 2207.14 (JC-45.1-12-284, JCB-12-63) Committee(s): JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PC4-RDIMM_090_Annex-F |
PRN14-NM10 | May 2014 |
Item 2241.11 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PC2-4200/PC2-3200 DDR2 Registered Mini-DIMM Design Specification Revision 2.0 |
MODULE4.20.14 | Dec 2006 |
Release No. 16. Item 2105.00 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PC-2700/PC-3200 Registered DIMM Design Specification Revision 2.2 |
MODULE4.20.7 | May 2021 |
Release 31. Item 2029.04This revision contains terminology updates only. JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Labeling Requirements for DDR Series DIMMsRelease Number: 28 |
DIMM-LABEL4.19 | Oct 2018 |
This standard provides the labels for the DDR Series DIMMs. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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JEDEC MODULE SIDEBAND BUS (SidebandBus) |
JESD403-1B | Aug 2022 |
This standard defines the assumptions for the system management bus for next generation memory solutions; covering the interface protocol, use of hub devices, and voltages appropriate to these usages. Item 2260.56A. Committee(s): JC-45 Free download. Registration or login required. |
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FBDIMM STANDARD: DDR2 SDRAM FULLY BUFFERED DIMM (FBDIMM) DESIGN STANDARD |
JESD205 | Mar 2007 |
This standard defines the electrical and mechanical requirements for 240-pin, PC2-4200/PC2-5300/PC2-6400, 72 bit-wide, Fully Buffered Double Data Rate Synchronous DRAM Dual In-Line Memory Modules (DDR2 SDRAM FB-DIMMs).These SDRAM FB-DIMMs are intended for use as main memory when installed in systems such as servers and workstations. PC2-4200/PC2-5300/PC2-6400 refers to the DIMM naming convention in which PC2-4200/PC2-5300/PC2-6400 indicates a 240-pin DDR2 DIMM running at 266/333/400 MHz DRAM clock speed and offering 4266/5333/6400 MB/s bandwidth. Patents(): There are known patent issues that are common to all FBDIMM related specifications. See document for link to FBDIMM Patents. Free download. Registration or login required. |
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DIMM Design Files |
DIMM Homepage | Dec 2003 |
These reference files are registered as industry accepted examples for use by manufacturers. Please be sure to read the license agreement prior to downloading files. Design Files (Gerber Files) have been developed in accordance with the JEDEC Manual of Operation and Procedure. |
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DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Common Standard |
JESD308 | May 2022 |
This standard defines the electrical and mechanical requirements for 288-pin, 1.1 V (VDD), Unbuffered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR5 SDRAM UDIMMs). These DDR5 Unbuffered DIMMs (UDIMMs) are intended for use as main memory when installed in Computers. Item 2265.02B Committee(s): JC-45.3 Free download. Registration or login required. |
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DDR5 UDIMM Raw Card Annex ERelease Number: Version 1.0 |
JESD308-U4-RCE | Jul 2022 |
This annex JESD308-U4-RCE, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) with 4-bit ECC (EC4 SODIMM) Raw Card E Annex" defines the design detail of x8, 2 Package Ranks DDR5 ECC UDIMM. The common feature of DDR5 UDIMM such as the connector pinout can be found in the JESD308, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Common Standard. Item 2265.12A Committee(s): JC-45.3 Free download. Registration or login required. |
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DDR5 UDIMM Raw Card Annex CRelease Number: Version 1.0 |
JESD308-U0-RCC | Jul 2022 |
This annex JESD308-U0-RCC, “DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Raw Card C Annex” defines the design detail of x16, 1 Package Ranks DDR5 UDIMM. The common feature of DDR5 UDIMM such as the connector pinout can be found in the JESD308, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Common Standard. Item 2265.08A Committee(s): JC-45.3 Free download. Registration or login required. |
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DDR5 UDIMM Raw Card Annex BRelease Number: Version 1.0 |
JESD308-U0-RCB | Jul 2022 |
This annex JESD308-U0-RCB, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Raw Card B Annex defines the design detail of x8, 2 Package Ranks DDR5 UDIMM. The common feature of DDR5 UDIMM such as the connector pinout can be found in the JESD308, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Common Standard. Item 2265.11A Committee(s): JC-45.3 Free download. Registration or login required. |
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DDR5 UDIMM Raw Card Annex ARelease Number: Version 1.0 |
JESD308-U0-RCA | Jul 2022 |
This annex JESD308-U0-RCA, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Raw Card AAnnex defines the design detail of x8, 1 Package Rank DDR5 UDIMM. The common feature of DDR5 UDIMM such as the connector pinout can be found in the JESD308, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Common Standard. Item 2265.13A Committee(s): JC-45.3 Free download. Registration or login required. |
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DDR5 UDIMM Raw Card Annex ARelease Number: Version 1.0 |
JESD308-U0-RCA | Jul 2022 |
This annex JESD308-U0-RCA, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Raw Card AAnnex defines the design detail of x8, 1 Package Rank DDR5 UDIMM. The common feature of DDR5 UDIMM such as the connector pinout can be found in the JESD308, DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Common Standard. Item 2265.13A Committee(s): JC-45.3 Free download. Registration or login required. |
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DDR5 SODIMM Raw Card Annex E |
JESD309-S4-RCE | Jun 2022 |
This annex JESD309-S4-RCE, DDR5 Small Outline Dual Inline Memory Module with 4-bit ECC (EC4SODIMM) Raw Card E Annex" defines the design detail of x8, 2 Package Ranks DDR5 ECC SODIMM. The common feature of DDR5 SODIMM such as the connector pinout can be found in the JESD309, DDR5 Small Outline Dual Inline Memory Module (SODIMM) Common Standard. Free download. Registration or login required. |
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DDR5 SODIMM Raw Card Annex D Version 1.0 |
JESD309-S4-RCD | Jun 2022 |
This annex JESD309-S4-RCD, DDR5 Small Outline Dual Inline Memory Module with 4-bit ECC (EC4 SODIMM) Raw Card D Annex defines the design detail of x8, 1 Package Rank DDR5 SODIMM with 4-bit ECC. The common feature of DDR5 SODIMM such as the connector pinout can be found in the JESD309, DDR5 Small Outline Dual Inline Memory Module (SODIMM) Common Standard. Committee(s): JC-45.3 Free download. Registration or login required. |
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DDR5 SODIMM Raw Card Annex C Version 1 |
JESD309-S0-RCC | Jun 2022 |
This annex JESD309-S0-RCC, DDR5 Small Outline Dual Inline Memory Module (SODIMM) Raw CardC Annex defines the design detail of x16, 1 Package Ranks DDR5 SODIMM. The common feature of DDR5 SODIMM such as the connector pinout can be found in the JESD309, DDR5 Small Outline Dual Inline Memory Module (SODIMM) Common Standard. Free download. Registration or login required. |
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DDR5 SODIMM Raw Card Annex B. Version 1.0 |
JESD309-S0-RCB | Aug 2022 |
This annex JESD309-S0-RCB, DDR5 Small Outline Dual Inline Memory Module with 0-bit ECC (EC0 SODIMM) Raw Card B Annex" defines the design detail of x8, 2 Package Ranks DDR5 NECC SODIMM. The common feature of DDR5 SODIMM such as the connector pinout can be found in the JESD309, DDR5 Small Outline Dual Inline Memory Module (SODIMM) Common Standard. Committee(s): JC-45.3 Free download. Registration or login required. |
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DDR5 Serial Presence Detect (SPD) ContentsTerminology update Release Number: Version 1.1 |
JESD400-5A.01 | Jan 2023 |
This standard describes the serial presence detect (SPD) values for all DDR5 memory modules. In this context, “modules” applies to memory modules like traditional Dual In-line Memory Modules (DIMMs) or solder-down motherboard applications. The SPD data provides critical information about all modules on the memory channel and is intended to be used by the system's BIOS in order to properly initialize and optimize the system memory channels. Committee(s): JC-45 Free download. Registration or login required. |
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DDR5 RDIMM Standard, Annex FRelease Number: Version 1.0 |
JESD305-R4-RCF | Apr 2022 |
This standard, JESD305-R4-RCF, DDR5 Registered Dual Inline Memory Module with 4-bit ECC (EC4 RDIMM) Raw Card F Annex, defines the design detail of x4, 1 Package Rank DDR5 RDIMM with 4-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.10. Committee(s): JC-45.1 Free download. Registration or login required. |
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DDR5 RDIMM Standard, Annex CRelease Number: Version 1.0 |
JESD305-R8-RCC | Apr 2022 |
This standard, JESD305-R8-RCC, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card C Annex, defines the design detail of x4, 1 Package Rank DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.12. Committee(s): JC-45.1 Free download. Registration or login required. |
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DDR5 RDIMM Standard Annex ERelease Number: Version 1.0 |
JESD305-R8-RCE | Apr 2022 |
This standard, JESD305-R8-RCE, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card E Annex, defines the design detail of x8, 2 Package Ranks DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.13. Committee(s): JC-45.1 Free download. Registration or login required. |
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DDR5 RDIMM Standard Annex DRelease Number: Version 1.0 |
JESD305-R8-RCD | Apr 2022 |
This standard, JESD305-R8-RCD, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card D Annex, defines the design detail of x8, 1 Package Rank DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.03 Committee(s): JC-45.1 Free download. Registration or login required. |
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DDR5 RDIMM Standard Annex BRelease Number: Version 1.0 |
JESD305-R4-RCB | Apr 2022 |
This standard, JESD305-R4-RCB, DDR5 Registered Dual Inline Memory Module with 4-bit ECC (EC4 RDIMM) Raw Card B Annex, defines the design detail of x4, 2 Package Ranks DDR5 RDIMM with 4-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Standard. Item 2273.14. Committee(s): JC-45.1 Free download. Registration or login required. |
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DDR5 RDIMM Standard Annex ARelease Number: Version 1.0 |
JESD305-R8-RCA | Mar 2022 |
Item 2273.16 Committee(s): JC-45.1 Free download. Registration or login required. |
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DDR5 Load Reduced (LRDIMM) and Registered Dual Inline Memory Module (RDIMM) Common Specification |
JESD305 | Jan 2022 |
This standard defines the electrical and mechanical requirements for 288-pin, 1.1 Volt (VDD and VDDQ), DDR5 Registered (RDIMM) and Load Reduced (LRDIMM), Double Data Rate (DDR), Synchronous DRAM Dual In-Line Memory Modules (DIMM). These 288-pin Registered and Load Reduced DDR5 SDRAM DIMMs are intended for use in server, workstation, and database environments. Item 2273.07. Committee(s): JC-45.1 Free download. Registration or login required. |