Global Standards for the Microelectronics Industry
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| Title | Document # |
Date |
|---|---|---|
DDR4 NVDIMM-P BUS PROTOCOL |
JESD304-4.01 | Jan 2021 |
This version is a minor editorial adding Annex B that was left out of the original publication October 2020.An NVDIMM-P device is defined as a LRDIMM memory module which provides host controller access to DRAM and/or other memory devices such as persistent memory. A transactional protocol is described for NVDIMM-P, which may be used on a DDR interface allowing operation of both standard DRAM modules and NVDIMM-P modules on the same channel. Item 2233.98K. Committee(s): JC-45.6 Free download. Registration or login required. |
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Annex D, R/C D, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Load Reduced DIMM Design SpecificationRelease Number: 30 |
MODULE4.20.27.D | Dec 2020 |
This specification defines the electrical and mechanical requirements for Raw Card D, 288-pin, 1.2 Volt (VDD), Load Reduced, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM LRDIMMs). These DDR4 Load Reduced DIMMs (LRDIMMs) are intended for use as main memory when installed in PCs. Item 2204.23 Committee(s): JC-45.4 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Annex A, Raw Card A, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Load Reduced DIMM Design SpecificationRelease Number: 30 |
MODULE4.20.27.A | Dec 2020 |
Item No. 2204.22 Committee(s): JC-45.4 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Annex B, R/C B, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design SpecificationRelease Number: 30A |
MODULE4.20.26.B | Dec 2020 |
This document defines the electrical and mechanical requirements for Raw Card B, 288-pin, 1.2 Volt (VDD), Unbuffered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM UDIMMs). These DDR4 Unbuffered DIMMs (UDIMMs) are intended for use as main memory when installed in PCs. Item 2231.26. Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Annex B, Raw Card B, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Load Reduced DIMM Design SpecificationRelease Number: 30 |
MODULE4.20.27.B | Dec 2020 |
This specification defines the electrical and mechanical requirements for Raw Card B, 288-pin, 1.2 Volt (VDD), Load Reduced, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM LRDIMMs). These DDR4 Load Reduced DIMMs (LRDIMMs) are intended for use as main memory when installed in PCs. Item 2204.24. Committee(s): JC-45.4 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Annex E, R/C E, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Load Reduced DIMM Design SpecificationRelease Number: 30 |
MODULE4.20.27.E | Dec 2020 |
This specification defines the electrical and mechanical requirements for Raw Card E, 288-pin, 1.2 Volt (VDD), Load Reduced, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM LRDIMMs). These DDR4 Load Reduced DIMMs (LRDIMMs) are intended for use as main memory when installed in PCs. Item 2232.20. Committee(s): JC-45.4 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Annex D, R/C D, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design SpecificationRelease Number: 30 |
MODULE4.20.26.D | Dec 2020 |
This document defines the electrical and mechanical requirements for Raw Card D, 288-pin, 1.2 Volt (VDD), Unbuffered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM UDIMMs). These DDR4 Unbuffered DIMMs (UDIMMs) are intended for use as main memory when installed in PCs. Item 2231.21A. Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Annex A, R/C A, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design SpecificationRelease Number: 30A |
MODULE4.20.26.A | Nov 2020 |
This document defines the electrical and mechanical requirements for Raw Card A, 288-pin, 1.2 Volt (VDD), Unbuffered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM UDIMMs). These DDR4 Unbuffered DIMMs (UDIMMs) are intended for use as main memory when installed in PCs. Committee Item 2231.38A. Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 6Release Number: 30 |
SPD4.1.2.L-6 | Nov 2020 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 6. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01H. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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JEDEC MODULE SIDEBAND BUS (SidebandBus) |
JESD403-1 | Oct 2020 |
This standard defines the assumptions for the system management bus for next generation memory solutions; covering the interface protocol, use of hub devices, and voltages appropriate to these usages. Item 2260.37C. Committee(s): JC-45 Free download. Registration or login required. |
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