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Title	Document #	Date
DDR2 DIMM CLOCK SKEW MEASUREMENT PROCEDURE USING A CLOCK REFERENCE BOARD	JEP152	May 2007
This document is the work product of the JC-45.1 DDR2 DIMM Clock Skew Measurement task group.The purpose of this document is to define procedures to measure clock parameters on registered DIMMs using the DDR2 Clock Reference Board. It is NOT the intent of this document to set specification values or validation requirements. Committee(s): JC-45, JC-45.1 Free download. Registration or login required.
DDR3 Unbuffered MicroDIMM Design Specification, 214-Pin PC3-12800. Item 2031.04	MODULE4.20.17	Mar 2007
Release No. 17 Committee(s): JC-45, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
PC2-4200/PC2-3200 DDR2 Registered Mini-DIMM Design Specification Revision 2.0	MODULE4.20.14	Dec 2006
Release No. 16. Item 2105.00 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
100-Pin DDR SDRAM Unbuffered 32b-DIMM Design Specification	MODULE4.20.9	Nov 2004
Release No. 14 Committee(s): JC-42, JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
DIMM Design Files	DIMM Homepage	Dec 2003
These reference files are registered as industry accepted examples for use by manufacturers. Please be sure to read the license agreement prior to downloading files. Design Files (Gerber Files) have been developed in accordance with the JEDEC Manual of Operation and Procedure. Committee(s): JC-42, JC-45 See DIMM Homepage information

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JEDEC Education Series: Memory, Mobile & Modules