Global Standards for the Microelectronics Industry
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Title | Document # | Date |
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240-Pin PC2-6400/PC2-5300/PC2-4200/PC2-3200 DDR2 SDRAM Registered DIMM Design Standard, Rev 4.04. |
MODULE4.20.10 | Jan 2010 |
Release No. 19A. Items 2133.37, 2191.00, 2191.02, 2129.12, 2113.33. JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Annex W, R/C W, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.07 |
MODULE4.20.20.W | Aug 2009 |
Release No. 19 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Annex Y, R/C Y, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.06 |
MODULE4.20.20.Y | Aug 2009 |
Release No. 19 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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200-Pin DDR2 SDRAM Unbuffered SODIMM Design Specification |
MODULE4.20.11 | Jun 2008 |
Release No. 18. Item 2168.01 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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DDR2 DIMM CLOCK SKEW MEASUREMENT PROCEDURE USING A CLOCK REFERENCE BOARD |
JEP152 | May 2007 |
This document is the work product of the JC-45.1 DDR2 DIMM Clock Skew Measurement task group.The purpose of this document is to define procedures to measure clock parameters on registered DIMMs using the DDR2 Clock Reference Board. It is NOT the intent of this document to set specification values or validation requirements. Free download. Registration or login required. |