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Title	Document #	Date
DDR2 DIMM CLOCK SKEW MEASUREMENT PROCEDURE USING A CLOCK REFERENCE BOARD	JEP152	May 2007
This document is the work product of the JC-45.1 DDR2 DIMM Clock Skew Measurement task group.The purpose of this document is to define procedures to measure clock parameters on registered DIMMs using the DDR2 Clock Reference Board. It is NOT the intent of this document to set specification values or validation requirements. Committee(s): JC-45, JC-45.1 Free download. Registration or login required.
Annex W, R/C W, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.07	MODULE4.20.20.W	Aug 2009
Release No. 19 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Annex Y, R/C Y, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.06	MODULE4.20.20.Y	Aug 2009
Release No. 19 Committee(s): JC-45.1, JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
214-Pin DDR2 SDRAM Unbuffered MicroDIMM Design Specification	MODULE4.20.12	Apr 2004
Release No. 14 Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
100-Pin DDR SDRAM Unbuffered 32b-DIMM Design Specification	MODULE4.20.9	Nov 2004
Release No. 14 Committee(s): JC-42, JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
144-Pin EP2-2100 DDR2 SDRAM 32b S0DIMM Design Specification, Rev 1.0. Item 2043.09.	MODULE4.20.16	Feb 2007
Release No. 16 Committee(s): JC-45, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
DDR3 Unbuffered MicroDIMM Design Specification, 214-Pin PC3-12800. Item 2031.04	MODULE4.20.17	Mar 2007
Release No. 17 Committee(s): JC-45, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Annex H, R/C H, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.08	MODULE4.20.20.H	Aug 2009
Release No. 19 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Annex D, R/C D, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2082.22B	MODULE4.20.20.D	Feb 2009
Release No. 18 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SPD General Standard.	SPD4.1.2	Jul 2008
Release No. 19. Item 2065.26 Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
DDR3 DIMM Label	PRN09-NM4	Oct 2009
Preliminary publication of BoD-approved ballot material, prior to its inclusion in the next release of the appropriate JEDEC Standard. Item 2099.01b Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Annex G, R/C G, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2082.24B	MODULE4.20.20.G	Feb 2009
Release No. 18 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
FBDIMM STANDARD: DDR2 SDRAM FULLY BUFFERED DIMM (FBDIMM) DESIGN STANDARD	JESD205	Mar 2007
This standard defines the electrical and mechanical requirements for 240-pin, PC2-4200/PC2-5300/PC2-6400, 72 bit-wide, Fully Buffered Double Data Rate Synchronous DRAM Dual In-Line Memory Modules (DDR2 SDRAM FB-DIMMs).These SDRAM FB-DIMMs are intended for use as main memory when installed in systems such as servers and workstations. PC2-4200/PC2-5300/PC2-6400 refers to the DIMM naming convention in which PC2-4200/PC2-5300/PC2-6400 indicates a 240-pin DDR2 DIMM running at 266/333/400 MHz DRAM clock speed and offering 4266/5333/6400 MB/s bandwidth. Patents(): There are known patent issues that are common to all FBDIMM related specifications. See document for link to FBDIMM Patents. Committee(s): JC-45, JC-45.4 Free download. Registration or login required.
240-Pin PC2-6400/PC2-5300/PC2-4200/PC2-3200 DDR2 SDRAM Registered DIMM Design Standard, Rev 4.04.	MODULE4.20.10	Jan 2010
Release No. 19A. Items 2133.37, 2191.00, 2191.02, 2129.12, 2113.33. Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SPD Annex G, Serial Presence Detect for FBDIMM, Revision 1.1	SPD4.1.2.7	Jun 2006
Release No. 16A. Item 2003.02A Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
PC2-4200/PC2-3200 DDR2 Registered Mini-DIMM Design Specification Revision 2.0	MODULE4.20.14	Dec 2006
Release No. 16. Item 2105.00 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
200-Pin DDR2 SDRAM Unbuffered SODIMM Design Specification	MODULE4.20.11	Jun 2008
Release No. 18. Item 2168.01 Committee(s): JC-45, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
PC-2700/PC-3200 Registered DIMM Design Specification Revision 2.2	MODULE4.20.7	May 2021
Release 31. Item 2029.04 This revision contains terminology updates only. Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Annex M, R/C M, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2145.06A	MODULE4.20.20.M	Feb 2009
Release No. 18 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SPD Annex J: Serial Presence Detect for DDR2 SDRAM	SPD4.1.2.10	Jan 2007
Release No. 17 Committee(s): JC-42, JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.

Standards & Documents Search

DDR2 DIMM CLOCK SKEW MEASUREMENT PROCEDURE USING A CLOCK REFERENCE BOARD

Annex W, R/C W, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.07

Annex Y, R/C Y, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.06

214-Pin DDR2 SDRAM Unbuffered MicroDIMM Design Specification

100-Pin DDR SDRAM Unbuffered 32b-DIMM Design Specification

144-Pin EP2-2100 DDR2 SDRAM 32b S0DIMM Design Specification, Rev 1.0. Item 2043.09.

DDR3 Unbuffered MicroDIMM Design Specification, 214-Pin PC3-12800. Item 2031.04

Annex H, R/C H, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2156.08

Annex D, R/C D, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2082.22B

SPD General Standard.

DDR3 DIMM Label

Annex G, R/C G, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2082.24B

FBDIMM STANDARD: DDR2 SDRAM FULLY BUFFERED DIMM (FBDIMM) DESIGN STANDARD

240-Pin PC2-6400/PC2-5300/PC2-4200/PC2-3200 DDR2 SDRAM Registered DIMM Design Standard, Rev 4.04.

SPD Annex G, Serial Presence Detect for FBDIMM, Revision 1.1

PC2-4200/PC2-3200 DDR2 Registered Mini-DIMM Design Specification Revision 2.0

200-Pin DDR2 SDRAM Unbuffered SODIMM Design Specification

PC-2700/PC-3200 Registered DIMM Design Specification Revision 2.2

Annex M, R/C M, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification. Item 2145.06A

SPD Annex J: Serial Presence Detect for DDR2 SDRAM

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