Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
---|---|---|
Annex A: Differences between JESD21C Release 29 and its predecessor JESD21C, Release 28.Release Number: 29 |
AnnexA - JESD21C | Jan 2020 |
This table briefly describes the changes made to this standard, JESD21-C, Release 29, compared to its predecessor, JESD21C, Release 28. Committee(s): JC-42.2, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
ANNUAL UPDATING SERVICE: |
JESD21-C AUS | Jan 2004 |
The JEDEC Office has generated a mailing list for those who wish to subscribe to updates of this publication. A payment is required for subscription to this updating service. Committee(s): JC-42 |
||
Bit Wide DRAM |
DRAM3.9.1 | Jun 1999 |
Release No. 9 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Bit Wide ECL SRAM |
SRAM3.7.2 | Jul 1997 |
Release No. 9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Bit Wide SDRAM |
SDRAM3.11.1 | Jun 1997 |
Release No.9 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Bit Wide TTL SRAM |
SRAM3.7.1 | Dec 1995 |
Release No. 5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide |
EPROM3.4.1 | Jul 1997 |
Release No.9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide DRAM |
DRAM3.9.3 | Jun 1999 |
Release No. 9 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide ECL SRAM |
SRAM3.7.6 | Jul 1997 |
Release No. 9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide EEPROM |
EEPROM3.5.1 | Aug 2005 |
Release No. 14 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide MPDRAM |
MPDRAM3.10.2 | Jun 1997 |
Release No.9 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide PROM |
PROM3.3.2 | Dec 1993 |
Release No.1 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide ROM |
ROM3.2.1 | Dec 1992 |
Release No.2 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide SDRAM |
SDRAM3.11.3 | Jan 2004 |
Release No.13 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
Byte Wide SRAM |
SRAM3.7.5 | Apr 2003 |
Release No.12 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
COMMON FLASH INTERFACE (CFI) IDENTIFICATION CODES: |
JEP137B | May 2004 |
This publication is a companion document to the Common Flash Interface (CFI) standard, JESD68, which outlines the device and host system software interrogation handshake. JEP137 documents ID Code assignments for: 1)) the Algorithm-specific Command Set and Control Interfaces and 2) the Device Interfaces. It is published as needed when additions are made to either of these lists of codes. To make a request for an ID Code please contact the JEDEC Office at (703)907-7558. Committee(s): JC-42.4 Free download. Registration or login required. |
||
COMMON FLASH INTERFACE (CFI): |
JESD68.01 | Sep 2003 |
The Common Flash Interface (CFI) specification outlines a device and host system software interrogation handshake that allows specific software algorithms to be used for entire families of devices. This allows device-independent, JEDEC ID-independent, and forward- and backward-compatible software support for the specific flash families. It allows flash vendors to standardize their existing interfaces for long-term compatibility. The changes for this minor revision are indicated in Annex A on page 11. Committee(s): JC-42.4 Free download. Registration or login required. |
||
CONFIGURATIONS FOR SOLID STATE MEMORIES:Status: Under RevisionSections in this document may be under revision at any time. |
JESD21-C | Jan 2003 |
This revision of JESD21 is substantially different from previous issues because it reflects advancement in semiconductor technology and computer design needs. A new class of memory devices, the multiport DRAM (MPDRAM) C also know as 'Video Ram' because of the most common application for the devices C is represented. A new family of SRAMs which addresses the increasing need for high speed is introduced. Additional families of devices in the SOJ and Zip packages are included. The material in this revision is organized primarily by function (ROM, EPROM, SRAM, DRAM, etc.) rather than by technology and word length. Pinouts for SIMM and DIMM are included along with presence detect schemes. A current set of terms has also been included. JESD21-C is a compilation of all memory device standards that have been developed by the JC-42 Committee and approved by the JEDEC BoD from September 1989 to present. This latest issue has changed to a loose-leaf format and comes in a three-ring binder so that new drawings can be added without requiring a new publication. Time of publication of the material is identified by release number, i.e., if marked Release 8, this item was approved and released in 1998, if marked Release 13, this item was approved and released in 2003. Committee(s): JC-42 |
||
DDR Specific SDRAM Functions |
SDRAM3.11.5.2 | Jun 2003 |
Release No. 13 Committee(s): JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
||
DDR2 SDRAM STANDARD |
JESD79-2F | Nov 2009 |
This comprehensive standard defines all required aspects of 256Mb through 4Gb DDR2 SDRAMs with x4/x8/x16 data interfaces, including pinout, addressing, functional description, features, ac and dc parametrics, truth tables, and packages. Standard JESD79-2 uses a SSTL_18 interface, which is described in another JEDEC standard called JESD8-15. The purpose of this Standard is to define the minimum set of requirements for compliant devices 256Mb through 4Gb, x4/x8/x16 DDR2 SDRAMs. System designs based on the required aspects of this specification will be supported by all DDR2 SDRAM vendors providing compliant devices. Changes between versions is indicated in Annex A. Item 1778.01 Free download. Registration or login required. |