Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # |
Date![]() |
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DDR3 SDRAM STANDARD |
JESD79-3F | Jul 2012 |
This document defines the DDR3 SDRAM standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 512 Mb through 8 Gb for x4, x8, and x16 DDR3 SDRAM devices. This document was created based on the DDR2 standard (JESD79-2) and some aspects of the DDR standard (JESD79). Each aspect of the changes for DDR3 SDRAM operation were considered and approved by committee ballots). The accumulation of these ballots were then incorporated to prepare this standard (JESD79-3), replacing whole sections and incorporating the changes into Functional Description and Operation. Item 1627.14 Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s): JC-42.3 Available for purchase: $247.00 Add to Cart Paying JEDEC Members may login for free access. |
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WIDE I/O SINGLE DATA RATE (WIDE I/O SDR) |
JESD229 | Dec 2011 |
This standard defines the Wide I/O specification, including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. This standard covers the following technologies: Wide I/O. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 1 Gb through 32 Gb SDRAM (monolithic density) devices with 4, 128b wide channels using direct chip-to-chip attach methods between 1 to 4 memory devices and a controller device. Free download. Registration or login required. |
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Addendum No. 2 to JESD79-3, 1.25 V DDR3U-800, DDR3U-1066, DDR3U-1333, and DDR3U-1600 |
JESD79-3-2 | Oct 2011 |
The purpose of this addendum is to define the DDR3U specifications that supersede the DDR3 specifications in the JESD79-3. The use of DDR3-800, DDR3-1066, DDR3-1333, and DDR3-1600 titles in JESD79-3 are to be interpreted as DDR3U-800, DDR3U-1066, DDR3U-1333, and DDR3U-1600, respectively, when applying towards DDR3U definition; unless specifically stated otherwise. Item 1769.01 Committee(s): JC-42.3 Free download. Registration or login required. |
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Serial Presence Detect (SPD) Table of Contents |
SPD4.1.TOC | Mar 2010 |
Release No. 19 Committee(s): JC-42.3, JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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LOW POWER DOUBLE DATA RATE (LPDDR) SDRAM STANDARD |
JESD209B | Feb 2010 |
This standard defines the Low Power Double Data Rate (LPDDR) SDRAM, including features, functionality, AC and DC characteristics, packages, and pin assignments. This scope may be expanded in future to also include other higher density devices. The purpose of this document is to define the minimum set of requirements for JEDEC compliant 64Mb through 2Gb for x16 and x32 Low Power Double Data Rate SDRAM devices. System designs based on the required aspects of this standard will be supported by all LPDDR SDRAM vendors providing compliant devices. (JESD209 was originally numbered as JESD79-4 May 2006 to August 2007, corrected to JESD209 09/17/2007). Patents(): See Document Committee(s): JC-42.3, JC-42.6 Free download. Registration or login required. |
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DDR2 SDRAM STANDARD |
JESD79-2F | Nov 2009 |
This comprehensive standard defines all required aspects of 256Mb through 4Gb DDR2 SDRAMs with x4/x8/x16 data interfaces, including pinout, addressing, functional description, features, ac and dc parametrics, truth tables, and packages. Standard JESD79-2 uses a SSTL_18 interface, which is described in another JEDEC standard called JESD8-15. The purpose of this Standard is to define the minimum set of requirements for compliant devices 256Mb through 4Gb, x4/x8/x16 DDR2 SDRAMs. System designs based on the required aspects of this specification will be supported by all DDR2 SDRAM vendors providing compliant devices. Changes between versions is indicated in Annex A. Item 1778.01 Free download. Registration or login required. |
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TS3000 Standalone Thermal Sensor Component |
SPD4.1.5 | Nov 2009 |
Release No. 19A, Item 1640.11 Committee(s): JC-42.4 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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TSE2002 Serial Presence Detect with Thermal Sensor |
PRN09-NV2 | Jul 2009 |
Preliminary publication of BoD-approved ballot material, prior to its inclusion in the next release of the appropriate JEDEC Standard. Item 1756.00A Committee(s): JC-42.4 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Addendum No. 1 to JESD209A, LOW POWER DOUBLE DATA RATE (LPDDR) SDRAM, 1.2 V I/O. |
JESD209A-1 | Mar 2009 |
This document defines the Low Power Double Data Rate (LPDDR) SDRAM 1.2 V I/O, including AC and DC operating conditions, extended mode register settings, and I-V characteristics. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 64 Mb through 2 Gb for x16 and x32 Low Power Double Data Rate SDRAM devices with 1.2 V I/O. System designs based on the required aspects of this specification will be supported by all LPDDR SDRAM vendors providing compliant devices. Committee(s): JC-42.6 Free download. Registration or login required. |
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Low Power Double Data Rate (LPDDR) Non-Volatile Memory (NVM) (Item 1674.17, 1674.16, 1674.20 |
NVRAM3.6.3 | Feb 2009 |
Release No. 18A JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |