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Title	Document #	Date
Addendum No. 1 to JESD209A, LOW POWER DOUBLE DATA RATE (LPDDR) SDRAM, 1.2 V I/O.	JESD209A-1	Mar 2009
This document defines the Low Power Double Data Rate (LPDDR) SDRAM 1.2 V I/O, including AC and DC operating conditions, extended mode register settings, and I-V characteristics. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 64 Mb through 2 Gb for x16 and x32 Low Power Double Data Rate SDRAM devices with 1.2 V I/O. System designs based on the required aspects of this specification will be supported by all LPDDR SDRAM vendors providing compliant devices. Committee(s): JC-42.6 Free download. Registration or login required.
DDR2 Specific SDRAM Function	SDRAM3.11.5.5	Jul 2008
Release No. 18 Committee(s): JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Word Wide SDRAM.	SDRAM3.11.4	Feb 2008
Release No. 17. Item 1749.01 Committee(s): JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
DOUBLE DATA RATE (DDR) SDRAM STANDARD	JESD79F	Feb 2008
This comprehensive standard defines all required aspects of 64Mb through 1Gb DDR SDRAMs with X4/X8/X16 data interfaces, including features, functionality, ac and dc parametrics, packages and pin assignments. This scope will subsequently be expanded to formally apply to x32 devices, and higher density devices as well The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 64Mb through 1Gb, X4/X8/X16 DDR SDRAMs. System designs based on the required aspects of this specification will be supported by all DDR SDRAM vendors providing JEDEC compliant devices. Committee(s): JC-42.3 Free download. Registration or login required.
SPECIALITY DDR2-1066 SDRAM	JESD208	Nov 2007
This document defines the Specialty DDR2-1066 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of requirements for JEDEC compliant 256 Mb through 4 Gb for x4, x8, and x16 Specialty DDR2-1066 SDRAM devices. Committee(s): JC-42.3 Free download. Registration or login required.
SPD Annex J: Serial Presence Detect for DDR2 SDRAM	SPD4.1.2.10	Jan 2007
Release No. 17 Committee(s): JC-42, JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SPD Annex I, Serial Presence Detect for Virtual Channel SDRAM, Revision 2	SPD4.1.2.9	Jun 2006
Release No.9A Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SDRAM and SGRAM Architectural Operational Features Table of Contents	SDRAM3.11.5.TOC	May 2006
Release No.16 Committee(s): JC-42, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
100-Pin DDR SDRAM Unbuffered 32b-DIMM Design Specification	MODULE4.20.9	Nov 2004
Release No. 14 Committee(s): JC-42, JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Nibble Wide SDRAM	SDRAM3.11.2	Jan 2004
Release No.13 Committee(s): JC-42, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.

Standards & Documents Search

Addendum No. 1 to JESD209A, LOW POWER DOUBLE DATA RATE (LPDDR) SDRAM, 1.2 V I/O.

DDR2 Specific SDRAM Function

Word Wide SDRAM.

DOUBLE DATA RATE (DDR) SDRAM STANDARD

SPECIALITY DDR2-1066 SDRAM

SPD Annex J: Serial Presence Detect for DDR2 SDRAM

SPD Annex I, Serial Presence Detect for Virtual Channel SDRAM, Revision 2

SDRAM and SGRAM Architectural Operational Features Table of Contents

100-Pin DDR SDRAM Unbuffered 32b-DIMM Design Specification

Nibble Wide SDRAM

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