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Title	Document #	Date
DEFINITION OF THE SSTVN16859 2.5-2.6 V 13-BIT TO 26-BIT SSTL_2 REGISTERED BUFFER FOR PC1600, PC2100, PC2700 AND PC3200 DDR DIMM APPLICATIONS	JESD82-13A.01	Mar 2023
Terminology update. Definition of the SSTVN16859 2.5-2.6 V 13-Bit to 26-Bit SSTL_2 Registered Buffer for PC1600, PC2100, PC2700, and PC3200 DDR DIMM Applications Committee(s): JC-40 Free download. Registration or login required.
DDR5 Registering Clock Driver Definition (DDR5RCD03) Release Number: 1.00	JESD82-513	Feb 2023
This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the DDR5 Registering Clock Driver (RCD) with parity for driving address and control nets on DDR5 RDIMM and LRDIMM applications. The DDR5RCD03 Device ID is DID = 0x0053. Committee(s): JC-40, JC-40.5 Free download. Registration or login required.
DDR5 Registering Clock Driver Definition (DDR5RCD02) Release Number: Rev. 1.00	JESD82-512	Feb 2023
This standard defines specifications of DC interface parameters, switching parameters, and test loading for definition of the DDR5 Registering Clock Driver (RCD) with parity for driving address and control nets on DDR5 RDIMM and LRDIMM applications. The DDR5RCD02 Device ID is DID = 0x0052. Committee(s): JC-40, JC-40.4 Free download. Registration or login required.
DEFINITION OF THE SSTU32S869 AND SSTU32D869 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS	JESD82-12A.01	Feb 2023
Terminology update. This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTU32S869 and SSTU32D869 registered buffer with parity for driving heavy load on high-density DDR2 RDIMM applications. A typical application would be a 36 SDRAM planar DIMM. Committee(s): JC-40 Free download. Registration or login required.
DEFINITION OF THE SSTUA32S868 AND SSTUA32D868 REGISTERED BUFFER WITH PARITY FOR 2R X 4 DDR2 RDIMM APPLICATIONS	JESD82-17.01	Feb 2023
(Terminology update.) This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUA32S868 and SSTUA32D868 registered buffer with parity test for DDR2 RDIMM applications. Committee(s): JC-40, JC-40.3 Free download. Registration or login required.

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