Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
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SPD5118 HUB and SERIAL PRESENCE DETECT DEVICE STANDARDRelease Number: Version 1.5.1 |
JESD300-5B.01 | May 2023 |
This standard defines the specifications of interface parameters, signaling protocols, and features for DDR5 Serial Presence Detect EEPROM with Hub function (SPD5 Hub) and integrated Temperature Sensor (TS) as used for memory module applications. The Hub feature allows isolation of a local bus from a Controller host bus. The designation SPD5118 or generic term SPD5 Hub refers to the devices specified by this standard. Committee(s): JC-40.1 Free download. Registration or login required. |
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PMIC5000/PMIC5010 Power Management IC Standard |
JESD301-1A.03 | Feb 2025 |
This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5000, PMIC5010 refers to the device specified by this document. The purpose is to provide a standard for the PMIC5000, PMIC5010 device for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. This is a minor update to correct the document name, and also remove the extraneous hard return in the middle of the description between “as” and “used”. Committee(s): JC-40.1 Free download. Registration or login required. |
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DDR5 REGISTERING CLOCK DRIVER DEFINITION (DDR5RCD01) |
JESD82-511 | Aug 2021 |
This document defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the DDR5 Registering Clock Driver (RCD) with parity for driving address and control nets on DDR5 RDIMM and LRDIMM applications. The DDR5RCD01 Device ID is DID = 0x0051. Committee(s): JC-40.4 Free download. Registration or login required. |
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TS511X, TS521X Serial Bus Thermal Sensor Device Standard |
JESD302-1A | Aug 2023 |
This standard defines the specifications of interface parameters, signaling protocols, and features for fifth generation Temperature Sensor (TS5) as used for memory module applications. These device operate on I2C and I3C two-wire serial bus interface. The designation TS521X and TS511X refers to the device specified by this document. Committee(s): JC-40.1 Free download. Registration or login required. |
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DDR5 Buffer Definition (DDR5DB01) - Rev. 1.1 |
JESD82-521 | Dec 2021 |
This standard defines standard specifications for features and functionality, DC & AC interface parameters and test loading for definition of the DDR5 data buffer for driving DQ and DQS nets on DDR5 LRDIMM applications. The purpose is to provide a standard for the DDR5DB01 (see Note) logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. Item 323.98K Committee(s): JC-40.4 Free download. Registration or login required. |