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Displaying 1 - 5 of 16 documents. Show 5 | 10 results per page.

Title	Document #	Date
COMPACT THERMAL MODEL OVERVIEW	JESD15-1	Oct 2008
This document should be used in conjunction with the master document, JESD15, and JESD15-2, and subsidiary documents as they become available. This document is intended to function as an overview to support the effective use of Compact Thermal Model (CTM) methodologies as specified in the companion methods documents. At present, there are two such documents; JESD15-3, and JESD15-4. Committee(s): JC-15, JC-15.1 Free download. Registration or login required.
DELPHI COMPACT THERMAL MODEL GUIDELINE	JESD15-4	Oct 2008
This guideline specifies the definition and lists acceptable approaches for constructing a compact thermal model (CTM) based on the DELPHI methodology. The purpose of this document is twofold. First, it aims to provide clear guidance to those seeking to create DELPHI compact models of packages. Second, it aims to provide users with an understanding of the methodology by which they are created and validated, and the issues associated with their use. Committee(s): JC-15 Free download. Registration or login required.
EXTENSION TO JESD51 THERMAL TEST BOARD STANDARDS TO ACCOMMODATE MULTI-CHIP PACKAGES	JESD51-32	Dec 2010
This document addresses the need for extending the existing thermal test board standards to accommodate the potential of higher electrical connection needs of multi-chip packages (MCPs) and the associated wire routing to implement these connections. The extensions described in this standard are also applicable to single chip packages needing more than 36 electrical connections for the test. Committee(s): JC-15 Free download. Registration or login required.
GLOSSARY OF THERMAL MEASUREMENT TERMS AND DEFINITIONS	JESD51-13	Jun 2009
This document provides a unified collection of the commonly used terms and definitions in the area of semiconductor thermal measurements. The terms and definitions provided herein extend beyond those used in the JESD51 family of documents to include other often used terms and definitions in the area of semiconductor thermal measurements. Committee(s): JC-15 Free download. Registration or login required.
GUIDELINE FOR MEASUREMENT OF ELECTRONIC PACKAGE INDUCTANCE AND CAPACITANCE MODEL PARAMETERS:	JEP123	Oct 1995
The need for this guideline arose from widespread lack of consistency in characterizing electrical parameters of electronic packages, which existed in the industry until the early 1990s. Then, the JEDEC Committee JC-15 provided the forum where various methods were discussed and commonality in approach emerged. The result is that today we have relatively consistent results in measuring and reporting electrical package parameters, as well as specialized tools (e.g., the IPA-510, the interconnect parameter analyzer) which were developed to support the methodology. Committee(s): JC-15.2, JC-15 Free download. Registration or login required.

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