Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # |
Date![]() |
---|---|---|
USER GUIDE FOR MICROCIRCUIT FAILURE ANALYSIS:Status: RescindedNovember 2004 |
JEB16 | Jul 1970 |
This guide defines generalized procedures for the failure analysis of monolithic integrated microelectronic circuits. Although the generalized procedural steps may apply to all microelectronic circuits, additional analysis steps unique to thin/thick film hybrid devices are not covered. Committee(s): JC-14 Free download. Registration or login required. |
||
SYMBOL AND LABEL FOR ELECTROSTATIC SENSITIVE DEVICESStatus: Reaffirmed October 1988, September 1996, September 2009, May 2018, October 2024 |
JESD471 | Feb 1980 |
This standard will be useful to anyone engaged in handling semiconductor devices and integrated circuits that are subject to permanent damage due to electrostatic potentials. The standard establishes a symbol and label that will gain the attention of those persons who might inflict electrostatic damage to the device. The label which is placed on the lowest practical level of packaging contains the words 'ATTENTION - OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES'. The symbol contained in this label, which may be used on the device itself, shows a hand in a triangle with a bar through it. Formerly known as EIA-471. Free download. Registration or login required. |
||
GUIDELINES FOR THE MEASUREMENT OF THERMAL RESISTANCE OF GaAs FETS: |
JEP110 | Jul 1988 |
This publication is intended for power GaAs FET applications requiring high reliability. An accurate measurement of thermal resistance is extremely important to provide the user with knowledge of the FETs operating temperature so that more accurate life estimates can be made. FET failure mechanisms and failure rates have, in general, an exponential dependence on temperature (which is why temperature-accelerated testing is successful). Because of the exponential relationship of failure rate with temperature, the thermal resistance should be referenced to the hottest part of the FET. Committee(s): JC-14.7 Free download. Registration or login required. |
||
HIGH TEMPERATURE CONTINUITYStatus: Rescinded November 1999 |
JESD22-C100-A | Jan 1990 |
Committee(s): JC-14.1 |
||
DISTRIBUTOR REQUIREMENTS FOR HANDLING ELECTROSTATIC -DISCHARGE SENSITIVE (ESDS) DEVICES: SUPERSEDED BY JESD42, March 1994.Status: Superseded |
JEP108-B | Apr 1991 |
Free download. Registration or login required. |
||
TRANSISTOR, GALLIUM ARSENIDE POWER FET, GENERIC SPECIFICATION:Status: Rescinded |
JES2 | Jul 1992 |
Establishes guideline requirements and quality assurance provisions for gallium arsenide power field-effect transistors (FETs, also know as MESFETs) designed for use in high-reliability space application such as spacecraft communications transmitters. Identifies the electrical parameters, wafer acceptance tests, screening tests, qualification tests, and lot acceptance tests pertinent to power GaAs FETs. Applicable to packaged and chip-carrier parts; portions may not be applicable to unpackaged and unmounted chips. **This document was rescinded on October 17, 2024, but is available for download for reference. purposes. Committee(s): JC-14.7 Free download. Registration or login required. |
||
FAILURE-MECHANISM-DRIVEN RELIABILITY QUALIFICATION OF SILICON DEVICESStatus: Rescinded, November 2004 |
JESD34 | Mar 1993 |
This document applies to the reliability qualification of new or changed silicon devices, and their materials or manufacturing processes. Does not address qualification of product quality or functionality. Provides an alternative to traditional stress-driven qualification. Committee(s): JC-14.2 Free download. Registration or login required. |
||
GUIDELINES FOR USER NOTIFICATION OF PRODUCT/PROCESS CHANGES BY SEMICONDUCTOR SUPPLIERS - SUPERSEDED BY JESD46, August 1997.Status: Rescinded |
JEP117 | Apr 1994 |
Committee(s): JC-14.4 Free download. Registration or login required. |
||
ADDENDUM No. 1 to JESD35, GENERAL GUIDELINES FOR DESIGNING TEST STRUCTURES FOR THE WAFER-LEVEL TESTING OF THIN DIELECTRICSStatus: Rescinded |
JESD35-1 | Sep 1995 |
JESD35-1 was rescinded by the committee in June 2024 and has been superseded by JESD263. This addendum expands the usefulness of the Standard 35 (JESD35) by detailing the various sources of measurement error that could effect the test results obtained by the ramped tests described in JESD35. Each source of error is described and its implications on test structure design is noted. This addendum can be used as a guide when designing test structures for the qualification and characterization of thin oxide reliability, specifically, by implementing accelerated voltage or current ramp tests. Committee(s): JC-14.2 |
||
MOISTURE-INDUCED STRESS SENSITIVITY FOR PLASTIC SURFACE MOUNT DEVICES - SUPERSEDED BY J-STD-020A, April 1999.Status: Rescinded, May 2000 |
JESD22-A112-A | Nov 1995 |
J-STD-020 is now on revision F. Free download. Registration or login required. |
||
STANDARD FOR FAILURE ANALYSIS REPORT FORMAT:Status: Rescinded January 2025 |
JESD38 | Dec 1995 |
This standard is to promote unification of content and format of semiconductor device failure-analysis reports so that reports from diverse laboratories may be easily read, compared, and understood by customers. Additional objectives are to ensure that reports can be easily ready by users, satisfactorily reproduced on copying machines, adequately transmitted by telefax, and conveniently stored in standard filing cabinets. Committee(s): JC-14.4 Free download. Registration or login required. |
||
GUIDELINES FOR THE PACKING, HANDLING, AND REPACKING OF MOISTURE-SENSITIVE COMPONENTS - SUPERSEDED BY J-STD-033, May 1999.Status: RescindedNovember 1999 |
JEP124 | Dec 1995 |
Committee(s): JC-14.4 Free download. Registration or login required. |
||
ADDENDUM No. 2 to JESD35 - TEST CRITERIA FOR THE WAFER-LEVEL TESTING OF THIN DIELECTRICS:Status: Rescinded |
JESD35-2 | Feb 1996 |
JESD35-2 was rescinded by the committee in June 2024 and has been superseded by JESD263. This addendum includes test criteria to supplement JESD35. JESD35 describes procedures developed for estimating the overall integrity of thin oxides in the MOS Integrated Circuit manufacturing industry. Two test procedures are included in JESD35: a Voltage-Ramp (V-Ramp) and a Current-Ramp (J-Ramp). As JESD35 became implemented into production facilities on a variety of test structures and oxide attributes, a need arose to clarify end point determination and point out some of the obstacles that could be overcome by careful characterization of the equipment and test structures. Committee(s): JC-14.2 |
||
FAILURE-MECHANISM-DRIVEN RELIABILITY MONITORING - SUPERSEDED BY EIA/ANSI-659, July 1996.Status: Superseded |
JESD29-A | Jul 1996 |
Committee(s): JC-14.3 Free download. Registration or login required. |
||
GUIDE FOR STANDARD PROBE PAD SIZES AND LAYOUTS FOR WAFER LEVEL ELECTRICAL TESTING:Status: Rescinded September 2021 (JC-14.2-21-182) |
JEP128 | Nov 1996 |
This guide has been replaced by JESD241: September 2021. Committee(s): JC-14.2 |
||
COMPONENT PROBLEM ANALYSIS AND CORRECTIVE ACTION REQUIREMENTS - SUPERSEDED BY EIA-671, November 1996.Status: Superseded |
JESD43 | Nov 1996 |
Committee(s): JC-14.4 Free download. Registration or login required. |
||
QUALITY SYSTEM ASSESSMENT - SUPERSEDED BY ANSI/EIA-670, June 1997.Status: Superseded |
JESD39-A | Jun 1997 |
Committee(s): JC-14.4 Free download. Registration or login required. |
||
NATIONAL ELECTRONIC PROCESS CERTIFICATION STANDARD; GOVERNMENT CONTRACTORS:Removed: August 25, 2003 |
EIA599-A | Jan 1998 |
Due to notification from the JC-14.4 subcommittee that the material contained in EIA599 has been replaced by the ISO 9000 series, the JEDEC Board of Directors, at its August 2003 meeting, approved to remove this standard from the JEDEC Free Download Area. Committee(s): JC-14.4 |
||
GUIDELINES FOR PREPARING CUSTOMER-SUPPLIED BACKGROUND INFORMATION RELATING TO A SEMICONDUCTOR-DEVICE FAILURE ANALYSIS:Status: Reaffirmed January 2025 |
JEP134 | Sep 1998 |
The purpose of this Guideline is to provide a vehicle for acquiring and transmitting the necessary information in a concise, organized, and consistent format. Included in the Guideline is a sample form that facilitates transferring the maximum amount of background data to the failure analyst in a readily interpretable format. Immediate availability of this key information assists that analyst in completing a timely and accurate failure analysis. Committee(s): JC-14.4 Free download. Registration or login required. |
||
SYMBOL AND LABELS FOR MOISTURE-SENSITIVE DEVICES - SUPERSEDED BY J-STD-033, April 2018.Status: Rescinded, November 2018 |
JEP113B | May 1999 |
Certain PSMC (Plastic Surface-mount Components) are subject to permanent damage due to moisture-induced failures encountered during high-temperature surface-mount processing unless appropriate precautions are observed. The purpose of this publication is to provide a distinctive symbol and labels to be used to identify those devices that require special packing and handling precautions. Committee(s): JC-14.1 Free download. Registration or login required. |