Global Standards for the Microelectronics Industry
Standards & Documents Search
Title![]() |
Document # | Date |
---|---|---|
TEST METHOD FOR QUALIFICATION AND ACCEPTANCE OF CIRCUIT SUPPORT FILMS FOR USE IN MICROELECTRONIC APPLICATIONS - SUPERSEDED BY JESD72, June 2001Status: Rescinded |
JEP112 | Jun 1987 |
Committee(s): JC-13 Free download. Registration or login required. |
||
STANDARD TEST PROCEDURE FOR NOISE MARGIN MEASUREMENTS FOR SEMICONDUCTOR LOGIC GATING MICROCIRCUITSStatus: Rescinded, October 2008 |
JESD390A | Feb 1981 |
Reaffirmed September 2003 Free download. Registration or login required. |
||
STANDARD TEST METHOD UTILIZING X-RAY FLUORESCENCE (XRF) FOR ANALYZING COMPONENT FINISHES AND SOLDER ALLOYS TO DETERMINE TIN (Sn) - LEAD (Pb) CONTENTReaffirmed June 2023 |
JESD213A | Apr 2017 |
This document is intended to be used by Original Component Manufacturers who deliver electronic components and Original Equipment Manufacturers who are the platform system integrators. It is intended to be applied prior to delivery by the OCMs and may be used by OEM system engineers and procuring activities as well as U.S Government Department of Defense system engineers, procuring activities and repair centers. This Standard establishes the instrumentation, techniques, criteria, and methods to be utilized to quantify the amount of Lead (Pb) in Tin-Lead (Sn/Pb) alloys and electroplated finishes containing at least 3 weight percent (wt%) Lead (Pb) using X-Ray Fluorescence (XRF) equipment. Reaffirmed June 2023
Committee(s): JC-13 Free download. Registration or login required. |
||
SOLDERABILITY TESTS FOR COMPONENT LEADS, TERMINATIONS, LUGS, TERMINALS AND WIRES:Removed 01/21/04 Release Number: B |
J-STD-002 | Feb 2003 |
At the request of IPC, J-STD-002B has been removed from the free download area. In its place, JEDEC's Test Method, JESD22-B102, Solderability, which includes lead-free, was made available until it was replaced by J-STD-002D.
Any revision to J-STD-002 will no longer be available for free to the industry on the JEDEC website. However, the document is available to the JEDEC formulating Committee members, in the Members Area.
If you are not a JEDEC member you may wish to try the IPC website or one of the resellers listed at: http://www.jedec.org/standards-document |
||
SELECTION OF BURN-IN / LIFE TEST CONDITIONS AND CRITICAL PARAMETERS FOR QML MICROCIRCUITS |
JEP163A | Jan 2023 |
This publication is a guideline to assist manufacturers of integrated circuits in defining conditions for burn-in and life test of their products to meet quality and reliability performance requirements of MIL-PRF-38535. Free download. Registration or login required. |