JEDEC Committee:
JC-45 DRAM Modules

The scope of JC-45 is to develop standards for DRAM modules, cards, and socket interfaces. These standards are to address architectural, electrical, test, and SPD issues relating to memory design and manufacturing for commercial applications.

Memory module is defined as a single or multiple PCBs that predominantly include multiple memory, logic, and passive devices in a planar or 3D layout for use with sockets.


Search by Keyword or Document Number

Recent Documents

BYTE ADDRESSABLE ENERGY BACKED INTERFACE JESD245D Jul 2020
Annex E, R/C E, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design Specification MODULE4.20.26.E Jun 2020
Annex B, R/C B, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design Specification MODULE4.20.26.B Jun 2020
Annex G, Raw Card G, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.G May 2020
Annex E, R/C E, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.E May 2020
Annex C, R/C C, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.C May 2020
Annex A, R/C A, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design Specification MODULE4.20.26.A Jan 2020
Annex B, R/C B, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification MODULE4.20.28.B Jan 2020
Annex E, R/C E, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification MODULE4.20.28.E Jan 2020
288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design Specification MODULE4.20.26 Aug 2019