JEDEC Committee:

Digital Logic JC-40

The products within JC-40's scope include digital integrated circuits without regard to their fabrication technology. The committee develops the definition of test parameters and their methods of measurement, and registration formats to promote standardization of type designations.

To accomplish these functions, the committee cooperates with other JEDEC committees and organizations on matters of terms and definitions, mechanical standardization, international standardization, and government liaison. The committee also maintains liaisons with user organizations to promote wide acceptance of the committee’s output.


Status (status)
JC-40.1 Digital Logic Families and Applications
JC-40.4 Registered & Fully Buffered Memory Support Logic
JC-40.5 Logic Validation and Verification

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Interested in JC-40’s Digital Logic mission? Find out more about the benefits of JEDEC membership today.

Membership Information

Committee Meetings

Eindhoven 5 - 9 Jun 2017
Chicago 28 - 1 Sep 2017
San Francisco 4 - 8 Dec 2017
Taipei 5 - 8 Mar 2018
Vancouver 4 - 7 Jun 2018

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