Global Standards for the Microelectronics Industry
JC-40 Digital Logic
The products within JC-40's scope include digital integrated circuits without regard to their fabrication technology. The committee develops the definition of test parameters and their methods of measurement, and registration formats to promote standardization of type designations.
To accomplish these functions, the committee cooperates with other JEDEC committees and organizations on matters of terms and definitions, mechanical standardization, international standardization, and government liaison. The committee also maintains liaisons with user organizations to promote wide acceptance of the committee’s output.
Search by Keyword or Document Number
|DDR5 Clock Driver Definition (DDR5CKD01)
|TS511X, TS521X Serial Bus Thermal Sensor Device Standard
|SPD5118 HUB and SERIAL PRESENCE DETECT DEVICE STANDARD
|PMIC50x0 Power Management IC Standard
|JESD301-1A.02 Rev. 1.8.5
|Definition of the SSTUB32869 Registered Buffer with Parity for DDR2 RDIMM Applications
|Fully Buffered DIMM Design for Test, Design for Validation (DFx)
|DEFINITION OF THE SSTVN16859 2.5-2.6 V 13-BIT TO 26-BIT SSTL_2 REGISTERED BUFFER FOR PC1600, PC2100, PC2700 AND PC3200 DDR DIMM APPLICATIONS
|DDR5 Registering Clock Driver Definition (DDR5RCD03)
|DDR5 Registering Clock Driver Definition (DDR5RCD02)
|DEFINITION OF THE SSTU32S869 AND SSTU32D869 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS