Global Standards for the Microelectronics Industry
JC-16 Interface Technology
The activities within JC-16’s scope include the specification of power supply voltage levels for digital integrated circuits and the definition of electrical interfaces between the components of a system. The committee scope further encompasses interface protocols, modeling, simulation, testing environments, and verification.
JC-16 also hosts efforts on operating environment specifications that are common to JC-40, JC-42, and JC-45. The committee maintains a liaison with other JEDEC committees and appropriate outside organizations, both in formulating standards and in promoting wide acceptance of the committee’s activities.
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|PART MODEL SCHEMAS
|Part Model Electrical Guidelines for Electronic-Device Packages – XML Requirements
|Serial Interface for Data Converters
|POD15 - 1.5 V PSEUDO OPEN DRAIN I/O
|POD135 - 1.35 V PSEUDO OPEN DRAIN I/O
|POD125 - 1.25 V PSEUDO OPEN DRAIN I/O
|1.05 V CMOS
|0.5 V LOW VOLTAGE SWING TERMINATED LOGIC (LVSTL05)
|1.8 V HIGH-SPEED LVCMOS (HS_LVCMOS) INTERFACE
|0.6 V LOW VOLTAGE SWING TERMINATED LOGIC (LVSTL06)