Global Standards for the Microelectronics Industry
JEDEC Committee:
JC-42 Solid State Memories
The products within JC-42's scope include all memory integrated circuits and programmable logic devices, whether static or dynamic, without regard to their fabrication technology or application. Examples include large static and dynamic RAMs, ROMs, EEPROMs, and PLDs. Activities include the development of technical information and standards pertaining to pinouts, operational characteristics including reading and writing algorithms, test parameters, characterization, and registration formats. The committee maintains liaisons with other JEDEC committees and outside organizations to promote wide acceptance of the committee’s actions.
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Recent Documents
Serial Flash Discoverable Parameters (SFDP) | JESD216G | Nov 2024 |
Low Power Double Data Rate Interface for Non-Volatile Memory (LPDDR4X-NVM) Standard | JESD326-4 | Nov 2024 |
NAND Flash Interface Interoperability | JESD230G | Oct 2024 |
STANDARD MANUFACTURERS IDENTIFICATION CODE | JEP106BK | Sep 2024 |
Graphics Double Data Rate 7 SGRAM Standard (GDDR7) | JESD239A | Sep 2024 |
Temperature Range and Measurement Standards for Components and Modules | JESD402-1B | Sep 2024 |
DDR5 SDRAM | JESD79-5C.01 | Jul 2024 |
Low Power Double Data Rate 4 (LPDDR4) | JESD209-4E | Jun 2024 |
SPI Safety Extensions (CRC) for Non Volatile SPI Flash Memories (QPI and xSPI) | JESD255 | Mar 2024 |
JC-42.6 MANUFACTURER IDENTIFICATION (ID) CODE FOR LOW POWER MEMORIES | JEP166E | Jul 2023 |