Memory Configurations: JESD21-C

JESD21-C, JEDEC Configurations for Solid State Memories, is a compilation of some 3000 pages of all memory device standards for solid state memory including DIMM, DRAM, SDRAM, MCP, PROM, and others from September 1989 to present. The document is divided into sections for ease of use. Each section can be searched by following one of the links listed on the menu "JESD21-C Standards" on the right of this page. 

The JEDEC JC-42 Committee on RAM Memory and its Subcommittees, JC-45 Committee on Memory Modules and its Subcommittees and the JC-63 Committee on Multi Chip Packages develop the standards in JESD21-C and are responsible for updating the publication.

An annual updating service for JESD21 is available by subscription. Subscribers receive periodic electronic updates for replacement or insertion into the hard copy JESD21-C.

A complete hard copy of JESD21-C is available for purchase. The hard copy comes in two 3” wide 3-ring binders so that future updates can be added with ease.


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Recent Documents

Annex C, R/C C, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification MODULE4.20.28.C Jun 2017
Annex B, R/C B, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification MODULE4.20.28.B May 2017
Annex A, R/C A, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.A May 2017
Annex B, R/C B, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design Specification MODULE4.20.26.B May 2017
Annex E, R/C E, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.E May 2017
Annex C, R/C C, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.C May 2017
Annex A: Differences between JESD21C Release 26 and its predecessor JESD21C, Release 26. AnnexA - JESD21C Jan 2017
Annex D, R/C D, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Load Reduced DIMM Design Specification MODULE4.20.27.D Dec 2016
Annex A, R/C A, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification MODULE4.20.28.A Nov 2016
288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/ PC4-3200 DDR4 SDRAM Non-Volatile NAND-Flash DIMM Design Specification MODULE4.20.29 Oct 2016

Events and Meetings

JC-16,40,42,45,63,64 Chicago 28 Aug - 1 Sep 2017
JC-16,40,42,45,63,64 San Francisco 4 - 8 Dec 2017
JC-16,40,42,45,63,64 Taipei 5 - 8 Mar 2018
JC-16,40,42,45,63,64 Vancouver 4 - 7 Jun 2018
JC-16,40,42,45,63,64 Charlotte 10 - 13 Sep 2018

Related Committees and Subcommittees

JC-42 Solid State Memories
JC-42.2 SRAM Memories
JC-42.3 DRAM Memories
JC-42.3B Functions, Features and Pinouts
JC-42.3C DRAM Parametrics
JC-42.3D DRAM Pinouts
JC-42.4 Non-Volatile Memory Devices
JC-42.6 Low Power Memories
JC-45 DRAM Modules
JC-45.1 Registered DRAM Modules
JC-45.2 Unbuffered DRAM Modules
JC-45.3 Unbuffered DRAM Modules
JC-45.4 Fully Buffered DRAM Modules
JC-45.5 Module Interconnect
JC-63 Multiple Chip Packages