Global Standards for the Microelectronics Industry
Registered Outlines: JEP95
JEP95, JEDEC Registered and Standard Outlines for Solid State and Related Products, is a compilation of some 3000 pages of outline drawings for microelectronic packages including transistors, diodes, DIPS, chip carriers, sockets, and package interface BGA outlines in both inch and metric versions. There are over 500 registrations in all.
The JEDEC JC-11 Committee on Mechanical Standardization develops the outlines in JEP95 and is responsible for updating the publication.
An annual updating service for JEP95 is available by subscription. Subscribers receive periodic electronic updates for replacement or insertion into the hard copy JEP95. Each year approximately 4-6 updates are distributed.
A complete hard copy of JEP95 is available for purchase which includes a main index. The hard copy is 3-hole punched and boxed. 3-ring binders are not included.
- About Publication 95 (JEP95)
- JEP95 Table of Contents
- Section 1: Preparation and Submission of Solid State Product Outline Drawings (Includes Terms and Definitions for JEP95)
- Section 2: Symbols List
- Section 3: Standard Practices and Procedures Table of Contents
- JEP95 Main Index to Outlines/Standards
JEDEC Design Guides (was JESD95-1, now section 4 in JEP95)
- Section 4: Design Requirements Table of contents
- Section 4: Introduction to Design Requirements
Carrier Outlines (CO)
Carrier Standards (CS)
Diode Outline (DO)
- Table of Contents
- By Device Type
- Archive Files Complete 10/21/03
Gauge Standards (GS)
Microelectronic Outline (MO)
Microelectronic Standards (MS)
Performance Standards (PS)
Socket Outlines (SO)
Transistor Outline (TO)
- Table of Contents
- By Device Type
- Archive Files Complete 1/10/02
Transistor Standards (TS)
Uncased Standards (US)
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