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Standards & Documents Search: Lead-Free Manufacturing
6 results
Results
| Title | Document # | Date |
|---|---|---|
| JOINT IPC/JEDEC STANDARD FOR MOISTURE/REFLOW SENSITIVITY CLASSIFICATION FOR NONHERMETIC SOLID STATE SURFACE-MOUNT DEVICES | J-STD-020D.1 | Mar 2008 |
This document identifies the classification level of nonhermetic solid-state surface mount devices (SMDs) that are sensitive to moisture-induced stress. It is used to determine what classification level should be used for initial reliability qualification. Once identified, the SMDs can be properly packaged, stored and handled to avoid subsequent thermal and mechanical damage during the assembly solder reflow attachment and/or repair operation. This revision now covers components to be processed at higher temperatures for lead-free assembly. A hard cop version is available for $20 each for IPC/JEDEC members and $40 for nonmembers. Free download. Registration or login required. |
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| JOINT IPC/JEDEC STANDARD FOR HANDLING, PACKING, SHIPPING, AND USE OF MOISTURE/REFLOW SENSITIVE SURFACE-MOUNT DEVICES (Available in German, www.ihs.com) | J-STD-033C | Jan 2012 |
NOTE - The Moisture Sensitive Caution Label (figure 3-4) has been editorially revised since originally posted 11/04/05, if you downloaded this file prior to 12/14/05 please download this revised version This document provides SMD manufacturers and users with standardized methods for handling, packing, shipping and use of moisture/reflow sensitive SMDs. Now updated to support components that may need to be processed at higher temperatures, such as lead-free processes, these methods help avoid damage from moisture absorption and exposure to solder reflow temperatures that can result in yield and reliability degradation. IPC/JEDEC J-STD-033C helps achieve safe and damage-free reflow with the dry packing process and provides a minimum shelf life of 12 months from the seal date when using sealed dry bags. Free download. Registration or login required. |
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| SOLDERABILITY | JESD22-B102E | Oct 2007 |
This test method provides optional conditions for preconditioning and soldering for the purpose of assessing the solderability of device package terminations. It provides procedures for dip & look solderability testing of through hole, axial and surface mount devices and a surface mount process simulation test for surface mount packages. The purpose of this test method is to provide a means of determining the solderability of device package terminations that are intended to be joined to another surface using lead (Pb) containing or Pb-free solder for the attachment. Committee(s): JC-14.1 Free download. Registration or login required. |
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| MARKING, SYMBOLS, AND LABELS FOR IDENTIFICATION OF LEAD (Pb) FREE ASSEMBLIES, COMPONENTS, AND DEVICES - SUPERSEDED BY J-STD-609, August 2007Status: Superseded by J-STD-609, August 2007 | JESD97 | May 2004 |
Committee(s): JC-14.1, JC-14.4 Free download. Registration or login required. |
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| MARKING AND LABELING OF COMPONENTS, PCBs AND PCBAs TO IDENTIFY LEAD (Pb), Pb-FREE AND OTHER ATTRIBUTES | J-STD-609A.01 | Feb 2011 |
This standard applies to boards/assemblies, to identify the type of Pb-free or Pb-containing solder used. This standard documents a method for identifying board surface finishes and Printed Circuit Board (PCB) resin systems. This standard applies to PCB base materials and for marking the type of conformal coating utilized on Printed Circuit Board Assemblies (PCBAs). Material and their containers previously marked or labeled according to JESD 97 or IPC-1066 need not be remarked unless agreed upon by the supplier and customer. Free download. Registration or login required. |
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| JOINT JEDEC/ECA STANDARD, DEFINING LOW-HALOGEN PASSIVES AND SOLID STATE DEVICES (Removal of BFR/CFR/PVC) This document replaces JEP709. | JS709 | Aug 2011 |
This standard provides terms and definitions for “low-halogen” passive and solid state devices and recommends methods for marking and labeling. This standard may be applied to all nonmetallic and nonceramic materials of passive and solid state devices. Examples of solid state devices include transistors, integrated circuits, modules consisting mainly of integrated circuits (e.g., multichip, hybrid), and memory modules (e.g., DIMM, SIMM). Examples of passive devices include resistors, capacitors, relays, inductors and connectors. Examples of electronic devices that are not covered by this standard include printed circuit boards, cables, assemblies, and electronic products. Free download. Registration or login required. |
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