|ADDENDUM No. 8 to JESD24 - METHOD FOR REPETITIVE INDUCTIVE LOAD AVALANCHE SWITCHING:Status: Reaffirmed October 2002||JESD24- 8||Aug 1992|
Determines the repetitive inductive avalanche switching capability of power switching transistors.
|DDR4 NVDIMM-N DESIGN STANDARD (Revision 1.0) This standard defines the electrical and mechanical requirements for 288-pin, 1.2 Volt (VDD), Double Data Rate, Synchronous SDRAM Nonvolatile Dual In-Line Memory Modules with NAND Flash backup (DDR4 NVDIMM-N). A DDR4 NVDIMM-N is a Hybrid Memory Module with a DDR4 DIMM interface consisting of DRAM that is made nonvolatile through the use of NAND Flash. NVDIMM-N modules adhere to the Byte Addressable Energy Backed Interface Standard, JESD245, that provides detailed logical behavior, interface, and register definitions. These DDR4 NVDIMM-N modules are intended for use as main memory or storage when installed in PCs. Item 2233.27||JESD248||Sep 2016|