- Home
- About JEDEC
- Standards & Documents
- Committees
- JC-10: Terms, Definitions, and Symbols
- JC-11: Mechanical Package Outlines - Standardization
- JC-13: Government Liaison
- JC-14: Quality and Reliability of Solid State Products
- JC-15: Electrical and Thermal Characterization Techniques for Electronic Packages and Interconnects
- JC-16: Voltage Level and Electrical Interface
- JC-22: Diodes and Thyristors
- JC-25: Transistors
- JC-40: Digital Logic
- JC-42: RAM Memory
- JC-45: Memory Modules
- JC-63: Multiple Chip Package
- JC-64: Flash Memory Module
- JC-65: RFID
- News
- Events & Meetings
- Join JEDEC
- Members Area
- Order JEP 95 and JESD21-C Related Products
- Privacy Policy
Standards & Documents Search: JES (JEDEC Specifications)
1 result
Results
| Title |
Document # |
Date |
|---|---|---|
| TRANSISTOR, GALLIUM ARSENIDE POWER FET, GENERIC SPECIFICATION: | JES2 | Jul 1992 |
Establishes guideline requirements and quality assurance provisions for gallium arsenide power field-effect transistors (FETs, also know as MESFETs) designed for use in high-reliability space application such as spacecraft communications transmitters. Identifies the electrical parameters, wafer acceptance tests, screening tests, qualification tests, and lot acceptance tests pertinent to power GaAs FETs. Applicable to packaged and chip-carrier parts; portions may not be applicable to unpackaged and unmounted chips. Committee(s): JC-14.7 Free download. Registration or login required. |
||
Current search
[×]
Document Type
: JES (JEDEC Specifications)Search by Keyword or Document Number
Guided search
Click a term to refine your current search.
Committees
Document Type
: all » JES (JEDEC Specifications)Standards and Documents Assistance
Contact Julie Carlson, 703-907-7559