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TERMS, DEFINTIONS, AND LETTER SYMBOLS FOR MICROCOMPUTERS AND MEMORY INTEGRATED CIRCUITS: ELEVATED TO JESD100, August 1993.Status: Rescinded
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JEP100 |
Sep 1979 |
Committee(s):
JC-10
Download JEP100 Free download. Registration or login required. |
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JEDEC REQUIREMENTS FOR CLASS B MICROCIRCUITS: RESCINDED, May 2006Status: Rescinded
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JEP101-C |
Nov 1995 |
Committee(s):
JC-13.2
Download JEP101-C Free download. Registration or login required. |
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STANDARD FOR 64K x 1 DYNAMIC RAM - SUPERSEDED BY JESD21-C.Status: Rescinded
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JEP102 |
Jan 1978 |
Committee(s):
JC-42
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SUGGESTED PRODUCT-DOCUMENTATION, CLASSIFICATIONS, AND DISCLAIMERSStatus: Reaffirmed
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JEP103A |
Jul 1996 |
In order to improve understanding between manufacturers and users, a consistent set of product-documentation classifications associated with the stages of product development.
Committee(s):
JC-10
Download JEP103A Free download. Registration or login required. |
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REFERENCE GUIDE TO LETTER SYMBOLS FOR SEMICONDUCTOR DEVICES:
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JEP104C.01 |
May 2003 |
This publication provides a quick reference to the letter symbols and corresponding terms that are defined in JESD77-B, Terms, Definitions, and Letter Symbols for Discrete Semiconductor and Optoelectronic Devices; JESD99-A, Terms, Definitions, and Letter Symbols for Microelectronic Devices, and JESD100-B, Terms, Definitions, and Letter Symbols for Microcomputers, Microprocessors, and Memory Integrated Circuits. It is intended to simplify interpretation of data sheets and specifications and to promote the uniform use of these symbols. The symbols relate to ratings and characteristics found in data sheets and other specifications. Some abbreviations used in lieu of symbols are also included. The newly added Annex B is provided as an aid to determining what symbol should be used and is organized by term, whereas the main body of the publication is organized by symbol or abbreviation as in previous versions. This version contains minor revisions
Committee(s):
JC-10
Download JEP104C.01 Free download. Registration or login required. |
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JEDEC GUIDELINE FOR THE CHARACTERIZATION OF HYBRID POLYMERIC MATERIALS - SUPERSEDED BY JESD72, June 2001Status: Rescinded
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JEP105 |
Apr 1983 |
Committee(s):
JC-13.5
Download JEP105 Free download. Registration or login required. |
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STANDARD MANUFACTURERS IDENTIFICATION CODE
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JEP106AC |
Aug 2010 |
The manufacturers identification code is defined by one or more 8 bit fields, each consisting of 7 data bits plus 1 odd parity bit. The manufacturers identification code is assigned, maintained and updated by the JEDEC Office. The intent of this identification code is that it may be used whenever a digital field is required, e.g., hardware, software, documentation, etc. To make a request for an ID Code please go to http://www.jedec.org/Home/MIDCODE_request.cfm
Committee(s):
JC-42.3, JC-42
Download JEP106AC Free download. Registration or login required. |
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TEST METHOD FOR QUALIFICATION AND ACCEPTANCE OF PARTICLE GETTERS FOR USE IN HYBRID MICROELECTRONIC APPLICATIONS - SUPERSEDED BY JESD72, June 2001Status: Rescinded
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JEP107 |
Apr 1985 |
Committee(s):
JC-13.5
Download JEP107 Free download. Registration or login required. |
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DISTRIBUTOR REQUIREMENTS FOR HANDLING ELECTROSTATIC -DISCHARGE SENSITIVE (ESDS) DEVICES: SUPERSEDED BY JESD42, March 1994.Status: Superseded
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JEP108-B |
Apr 1991 |
Committee(s):
JC-14.1, JC-14
Download JEP108-B Free download. Registration or login required. |
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GENERAL REQUIREMENTS FOR DISTRIBUTORS OF MILITARY SEMICONDUCTOR DEVICES:Status: Rescinded
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JEP109-C |
Mar 1995 |
Superseded by JESD31-A, June 2001.
Committee(s):
JC-13
Download JEP109-C Free download. Registration or login required. |
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GUIDELINES FOR THE MEASUREMENT OF THERMAL RESISTANCE OF GaAs FETS:
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JEP110 |
Jul 1988 |
This publication is intended for power GaAs FET applications requiring high reliability. An accurate measurement of thermal resistance is extremely important to provide the user with knowledge of the FETs operating temperature so that more accurate life estimates can be made. FET failure mechanisms and failure rates have, in general, an exponential dependence on temperature (which is why temperature-accelerated testing is successful). Because of the exponential relationship of failure rate with temperature, the thermal resistance should be referenced to the hottest part of the FET.
Committee(s):
JC-14.7
Download JEP110 Free download. Registration or login required. |
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TEST PROCEDURES FOR CUSTOM MONOLITHIC MICROCIRCUITS - SUPERSEDED BY MIL-PRF-38535C.Status: Rescinded
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JEP111 |
Jan 1986 |
Committee(s):
JC-13.2, JC-13
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TEST METHOD FOR QUALIFICATION AND ACCEPTANCE OF CIRCUIT SUPPORT FILMS FOR USE IN MICROELECTRONIC APPLICATIONS - SUPERSEDED BY JESD72, June 2001Status: Rescinded
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JEP112 |
Jun 1987 |
Committee(s):
JC-13
Download JEP112 Free download. Registration or login required. |
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SYMBOL AND LABELS FOR MOISTURE-SENSITIVE DEVICES
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JEP113-B |
May 1999 |
Certain PSMC (Plastic Surface-mount Components) are subject to permanent damage due to moisture-induced failures encountered during high-temperature surface-mount processing unless appropriate precautions are observed. The purpose of this publication is to provide a distinctive symbol and labels to be used to identify those devices that require special packing and handling precautions.
Committee(s):
JC-14.1
Download JEP113-B Free download. Registration or login required. |
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GUIDELINES FOR PARTICLE IMPACT NOISE DETECTION (PIND) TESTING, OPERATOR TRAINING, AND CERTIFICATION:
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JEP114.01 |
Oct 2007 |
This publication was developed to help the user of this test methodology avoid common interference ∆s to successful application. The guide contains sections on typical specification requirements, sources of particles, PIND test systems, calibration, maintenance, test interference's, operator training, particle recovery and failure analysis. Application of the information contained in the guide will improve the quality and affectivity for any PIND testing operation.
Committee(s):
JC-13.5, JC-13
Download JEP114.01 Free download. Registration or login required. |
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POWER MOSFET ELECTRICAL DOSE RATE TEST METHOD:Status: Reaffirmed
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JEP115 |
Aug 1989 |
The purpose of this Test Method is to establish electrical criteria for comparing and specifying power MOSFET performance under high dose rate radiation.
Committee(s):
JC-25
Download JEP115 Free download. Registration or login required. |
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CMOS SEMICUSTOM DESIGN GUIDELINES:
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JEP116 |
Nov 1991 |
The design of ASIC circuits is becoming a significant part of system or product design, yet many problems continue to exist in current design practice. The guidelines in this document provide an explanation of common ASIC design problems and concerns and where possible offer solutions.
Committee(s):
JC-44
Download JEP116 Free download. Registration or login required. |
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GUIDELINES FOR USER NOTIFICATION OF PRODUCT/PROCESS CHANGES BY SEMICONDUCTOR SUPPLIERS - SUPERSEDED BY JESD46, August 1997.Status: Rescinded
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JEP117 |
Apr 1994 |
Committee(s):
JC-14.4
Download JEP117 Free download. Registration or login required. |
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GUIDELINES FOR GaAs MMIC AND FET LIFE TESTING:
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JEP118 |
Jan 1993 |
These guidelines apply to monolithic microwave GaAs integrated circuits (MMICs) and their individual component building blocks, such as GaAs field effect transistors (FETs), resistors, and capacitors. The purpose of this document is to define a standard approach for evaluating the expected live of GaAs MMICs so that results from different life tests can be compared and so that wording of this document that the MMIC contains at least one FET, but the use of this document has no such limitation.
Committee(s):
JC-14.7
Download JEP118 Free download. Registration or login required. |
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A PROCEDURE FOR EXECUTING SWEAT:
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JEP119A |
Aug 2003 |
This document describes an algorithm for performing the Standard Wafer Level Electromigration Accelerated Test (SWEAT) method with computer controlled instrumentation. The algorithm requires a separate iterative technique (not provided) to calculate the force current for a given target time to failure.
This document does not specify what test structure to use with this procedure. However, users of this algorithm report its effectiveness on both straight-lines and via-terminated test structures. Some test-structures design features are provided in JESD87 and in ASTM 1259M - 96.
Committee(s):
JC-14.2
Download JEP119A Free download. Registration or login required. |