static phase offset (t(φ))

The time interval between similar points on the waveforms of the averaged input reference clock and the averaged feedback input signal when the phase-locked loop (PLL) is locked and the input reference frequency is stable.

NOTE 1 PLL jitter may cause excursions of t(φ) beyond the specified maximum.

NOTE 2 The term "PLL reference zero delay" has been used for this concept but its use is deprecated.

References

JESD65B, 9/03

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