Dictionary U

U

See "upper byte".

See "universal asynchronous receiver transmitter".

UB

See "upper-byte enable".

UJT

See "unijunction transistor".

Synonym for "erasable programmable read-only memory (EPROM)".

JESD100-B, 12/99

A device with some portion of the die exposed.

NOTE Usually the chip has bonding pads, bumps, etc. that may be bonded to pads or lands on a lead-frame, tape, substrate, or printed wiring board.

JESD30D, 7/06

Synonym for "gate array integrated circuit".

The reduction of the cross section of a material caused by etching action spreading beneath the edge of the photoresist or other masking films.

JESD99B, 5/07

The adhesive material applied between the solder bump side of the flip chip die and the substrate.

JESD22-B109, 6/02

Plated layers between the base metal and the outer surface finish.

JESD201, 3/06

A functional fault for which no test pattern can be created that will cause the effects of the fault to be observable at an externally accessible node.

JESD12-5, 8/88

A functional fault that causes effects that are not observed at an externally accessible node when the circuit is exercised by the existing test pattern.

JESD12-5, 8/88

A thyristor surge protective device (TSPD) that can switch in only one quadrant.

NOTE The two types are forward-conducting TSPDs and reverse-blocking TSPDs.

JESD77-B, 2/00

A three-terminal semiconductor device having one junction and a stable negative-resistance characteristic over a wide temperature range.

Graphic symbols (ref. IEEE Std 315):

NOTE In the graphic symbols, the envelope is optional if no element is shown connected to the envelope.

JESD77-B, 2/00

An output that, depending on its design, can either source or sink current, but not both.

JESD99B, 5/07

A technology for producing devices in which electrical conduction is due entirely to the flow of majority carriers.

JESD77-B, 2/00
JESD99B, 5/07

A physical space occupied by a single gate equivalent, including any area allocated to power connections, signal connections, and isolation requirements.

JESD12-1B, 8/93
JESD99B, 5/07

A measure of load (usually capacitance) equal to that presented by a specified input of a specified primitive.

JESD12-1B, 8/93
JESD99B, 5/07

A letter symbol that is used in place of the name of a unit.

NOTE Neither subscripts nor postscripts may be appended to unit symbols as a means of giving information about the special nature of the quantity under consideration. Such information should be conveyed instead by the quantity symbol.

JESD77-B, 2/00
JESD99B, 5/07

A circuit used in asynchronous data communication applications to provide all the necessary logic to recover data in a serial-in, parallel-out fashion and to transmit data in a parallel-in, serial-out fashion.

NOTE This circuit is usually full-duplex (i.e., it can transmit and receive simultaneously) with the option to handle various data word lengths.

JESD100-B, 12/99

A circuit used in synchronous/ asynchronous data communication applications to provide all the necessary logic to recover data in a serial-in, parallel-out fashion and to transmit data in a parallel-in, serial-out fashion.

NOTE This circuit is usually full-duplex (i.e., it can transmit and receive simultaneously) with the option to handle various data word lengths.

JESD100-B, 12/99

A circuit used in synchronous data communication applications to provide all the necessary logic to recover data in a serial-in, parallel-out fashion and to transmit data in a parallel-in, serial-out fashion.

NOTE This circuit is usually full-duplex (i.e., it can transmit and receive simultaneously) with the option to handle various data word lengths.

JESD100-B, 12/99

An electrostatic-discharge-sensitive (ESDS) device that is not in an electrostatic-discharge-protective package.

NOTE See "ESD-protective packing".

JESD625-A, 12/99

A circuit that contains logic functions that cannot be tested because of the lack of controllability or observability.

JESD12-1B, 8/93
JESD99B, 5/07

An indicator used in conjunction with a data or control term to signify that the combined term applies to the upper byte of a two-byte data interface device; e.g., UW means write enable, upper-byte.

JESD21-C, 1/97

An input that, when true, enables the upper byte data input/outputs, terminals DQ8 through DQ15.

JESD21-C, 1/97

An input that, when true, causes the data present on the upper byte input/outputs, terminals DQ8 through DQ15, to be written into the addressed cells of the device.

JESD21-C, 1/97

The typical number of gate equivalents that can be used in a given gate array size.

JESD12-1B, 8/93
JESD99B, 5/07

See "universal synchronous/asynchronous receiver transmitter".

The time interval equivalent to the ELF test duration, as determined by the product of the acceleration factor and the actual accelerated test time: A × tA.

JESD74A, 2/07

A single gate equivalent that has been interconnected and is employed in the functioning of the circuit.

JESD12-1B, 8/93
JESD99B, 5/07

The time interval between the start of use of an unrepairable unit and its statistically expected failure in an application.

JEP148, 4/04

A programmable space on some devices that allows users to store nonfunctional data of any sort. It is often used to track design revision numbers or other such identifying information.

JESD32, 6/96

See "universal synchronous receiver transmitter".

See "ultraviolet-erasable programmable read-only memory".

UW

See "upper-byte write enable".

See “uncorrectable bit-error rate”.

UBM

See “under-bump metal” and  “under-bump metallurgy”.

A metric for data corruption rate equal to the number of data errors per bit read after applying any specified error-correction method.

JESD22-A117B, 3/09

The metal layers located between the solder bump or column and the die.

JEP156, 3/09

A patterned, thin-film stack of material that provides 1) an electrical connection from the silicon die to a solder bump; 2) a barrier function to limit unwanted diffusion from the bump to the silicon die; and 3) a mechanical interconnection of the solder bump to the die through adhesion to the die passivation and attachment to a solder bump pad.

JEP154, 1/08

The metal layers located between the solder bump and the die.

JESD22-B109A, 1/09

A two-terminal ABD with a voltage-current avalanche breakdown characteristic in one direction and either a forward or a blocking characteristic in the other

NOTE    Large transient currents will be clamped for positive cathode-to-anode voltages when driven into the avalanche breakdown region with one or more p-n junctions placed in series or parallel with each junction connected in the same direction. Large transient currents may also be clamped for negative cathode-to-anode voltages at significantly lower voltages with the typical forward-conducting characteristics of a single p-n junction (or of multiple p-n junctions connected in the same direction). The most common type of unidirectional ABD has a forward-conducting characteristic.


  
                 

Unidirectional-conducting ABD                                               Unidirectional-blocking ABD

JESD77C, 10/09
JESD210, 12/07
 

A two-terminal device that has at least one unidirectional ABD with at least one rectifier p-n junction connected in series in the opposite polarity in order to reduce capacitance.

NOTE    The unidirectional-blocking low-capacitance ABD is intended to suppress transients in only one direction. The rectifier p-n junction(s) have low capacitance and block in the reverse direction; they are not intended to be operated in their reverse avalanche breakdown regions. The p-n junction that serves as the unidirectional ABD determines which terminal is the anode and which is the cathode; for that determination, the rectifier p-n junction is ignored.

 

JESD77C, 10/09
JESD210, 12/07

A two-terminal device comprising a unidirectional-blocking low-capacitance ABD and an anti-parallel diode.

NOTE    To create a low-capacitance ABD with a forward-conducting, low-voltage characteristic, a low-capacitance diode (such as a rectifier) is placed in anti-parallel to the unidirectional-blocking low-capacitance ABD. This diode must have a reverse blocking voltage greater than the avalanche breakdown voltage of the unidirectional ABD.

JESD77C, 10/09
JESD210, 12/07

The environmental factors during manufacturing, shipping, and useful life to which a component is exposed.

NOTE    The useful life consists of the operating, nonoperating, and storage lifetimes.

JESD94A, 7/08

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