Dictionary N

An environment of a semiconductor device in which the power loss in the device is dissipated by means of air currents whose velocity is less than 120 feet per minute, by radiation losses from the sur­face of the device, and by an unspecified amount of conduction losses through the leads to the electrical connections.

RS-323, 3/66

Negative bias temperature instability.

JESD90, 11/04
NC

See "no (internal) connection (pin)".

A charge-coupled device fabricated so that the charges stored in the potential wells are electrons.

JESD99B, 5/07

A field-effect transistor that has an n‑type conduction channel. (Ref. IEC 747‑8.)

JESD24, 7/85
JESD77-B, 2/00

A thyristor surge suppressor whose static characteristic has a negative-resistance slope between the breakover point and a higher-current, lower-voltage point at which switching occurs.

JESD77-B, 2/00

Any portion of the characteristic within which the differential resistance is negative.

JESD77-B, 2/00

The input threshold voltage when the input voltage is falling.

JESD99B, 5/07

The representation of the logic 1-state and the logic 0-state by the low and high levels, respectively. (Ref. ANSI/IEEE Std 91.)

JESD99B, 5/07

A list of all nets of a circuit.

JESD12-1B, 8/93
JESD99B, 5/07

The conversion of a netlist from one format to another.

JESD12-1B, 8/93
JESD99B, 5/07

A unique interconnection of specific circuit elements.

NOTE The primary inputs and primary outputs are considered to be circuit elements.

JESD12-1B, 8/93
JESD99B, 5/07
NF

See "no function".

A binary character string operated upon as a unit and shorter than a byte.

NOTE A nibble is usually four bits.

JESD100-B, 12/99

A device that has a parallel four-bit data interface.

NOTE For memory devices, this term should not be confused with "nibble mode", which refers to a serial-data-access mode.

JESD21-C, 1/97
JESD100-B#, 12/99

(1) A definable point in the process at which form, fit, or function of the product or service is altered.

(2) The end-point of a branch in a network or a point at which two or more branches meet.

(3) Within a circuit, a point of interconnection between two or more components.

EIA-557-A, 7/95
JEP131A, 5/05
JESD659B, 2/07
JESD12-5, 8/88
JEP155, 8/08

An input that is electrically connected to the device but for which the signal has no function in the device operation.

JESD21-C, 1/97

A terminal that has no internal connection and that can be used as a support for external wiring without disturbing the function of the device, provided that the voltage applied to this terminal (by means of the wiring) does not exceed the highest supply voltage rating of the circuit.

NOTE 1 If higher voltages are acceptable, this should be stated.

NOTE 2 The IEC equivalent term is "blank terminal"; nevertheless, the IEC abbreviation is "NC".

JESD21-C#, 1/97
JESD77-B, 2/00
JESD78A#, 2/06
JESD99B, 5/07

The current of an ideal current source (i.e., one having infinite internal impedance) in parallel with the input terminals of the device that represents the part of the internally generated noise that can properly be represented by a current source.

NOTE In the definition, the equivalent input noise voltage, which would be needed for a complete and precise description of the device noise, is neglected. If the external source impedance is infinite, the noise current represents the total noise.

JESD77-B, 2/00
RS-311-A, 11/81

The rms input signal or illumination power level needed to increase the output power to twice the value obtained with no input signal or illumination.

JESD99B, 5/07

The maximum voltage amplitude of extraneous signal that can be algebraically added to the noise-free worst-case input level without causing the output voltage to deviate from the allowable logic voltage level.

NOTE The term "input", as used here, refers to logic input terminals, power supply terminals, or ground reference terminals.

JESD99B, 5/07
RS-390-A, 2/81

The uniform physical absolute temperature at which a network (and all its sources, if it is a multiport network) would have to be maintained if it (and its sources) were passive, in order to make available (or deliver) the same random noise power per unit bandwidth (spectral density) at a given frequency that is actually available (or delivered) from the network. (Ref. IEC 747‑1.)

JESD77-B, 2/00
JESD99B, 5/07
RS-311-A, 11/81

The voltage of an ideal voltage source (i.e., one having zero internal impedance) in series with the input terminals of the device that represents the part of the internally generated noise that can properly be represented by a voltage source.

NOTE In the definition, the equivalent input noise current, which would be needed for a complete and precise description of the device noise, is neglected. If the external source impedance is zero, the noise voltage represents the total noise.

JESD77-B, 2/00
RS-311-A, 11/81

The nominal bulk voltage for a given technology.

JESD28-A, 12/01
JESD60A, 9/04
JESD90, 11/04

The measured dc supply current for each Vsupply pin (or pin group) with the device under test biased at the test temperature as defined in section 4 and table 1 of JESD78A.

JESD78A, 2/06

The nominal (drain) supply voltage for a given technology.

NOTE VDD is positive for both n‑channel and p‑channel MOSFETs.

JESD28-A, 12/01
JESD60A, 9/04
JESD90, 11/04

Product that fails to comply with user requirements, manufacturer's specifications, or statistical process control levels that the supplier has deemed critical to reliability.

JESD50A, 12/04

A component characteristic that does not conform to a specified criterion.

JESD16-A, 4/95

Not conforming to specification(s), procedures, or requirements.

EIA-557-A, 7/95

(1) A single component that has one or more nonconformances.

(2) A specific occurrence of a condition that does not conform to specification.

NOTE 1 Such an occurrence is sometimes called a discrepancy.

NOTE 2 See also "nonconformance".

JESD16-A, 4/95

EIA-557-A, 7/95
JESD659B, 2/07

A test that evaluates a device feature without degrading the device function or strength although the appearance may be altered.

JEP96, 3/77
Rescinded 4/00

An analog-to-digital converter [A digital-to-analog converter] with a specified nonlinear transfer function between the nominal midstep [step] values and the corresponding step widths [heights].

NOTE The function may be continuously nonlinear or piecewise linear.

JESD99B, 5/07

The peak reverse voltage including all nonrepetitive transient voltages but excluding all repetitive voltages.

JESD77-B, 2/00
JESD282-B, 4/00

A terminal that is not to be used in normal applications and that may or may not have an internal connection.

JESD21-C#, 1/97
JESD77-B, 2/00
JESD99B, 5/07

On an NVRAM, the input that enables the nonvolatile functions ST and RC as determined by the states of chip select, chip enable, output enable, and write enable.

JESD21-C, 1/97

A memory in which the data content is retained when power is no longer supplied to it.

JESD100-B, 12/99

An SRAM in which provisions exist on chip for the state of the cells to be saved when power is removed.

JESD21-C, 1/97

A solder bump that does not bond to the substrate pad metallization during the solder reflow process.

NOTE A nonwet solder bump is detected as an area on the substrate pad where, after tensile pull, the substrate pad metallization displays the original color and texture with no evidence of solder fusion. Depopulated areas, where no solder joint formation is expected, are excluded.

JESD22-B109, 6/02

The partial adherence of molten solder to a surface that it has contacted while leaving some basis metal exposed. (Ref. IPC‑T‑50.)

J-STD-002B, 2/03

A pin position on a package where the pin has been purposely left blank or removed after assembly. No physical pin is allowed in this position.

JESD21-C, 1/97

A continuous, symmetrical, bell-shaped frequency distribution for variables data. When measurements have a normal distrbution, about 68.26% of all individuals lie within plus or minus one standard deviation unit of the mean; about 95.44% lie within plus or minus two standard deviation units of the mean; and about 99.73% of all individuals lie within plus or minus three standard deviation units of the mean.

EIA-557-A, 7/95

Synonym for "nonusable terminal".

JESD21-C#, 1/97

Acronym for "nonvolatile random-access memory". See also "NVRAM".

JESD100-B, 12/99
NP

See "no pin".

An extrinsic semiconductor in which the conduction-electron density exceeds the mobile-hole density. (Ref. IEC 747‑1.)

JESD77-B, 2/00
NU

See "nonusable terminal".

Abbreviation for "nonvolatile random-access memory". See also "NOVRAM".

JESD100-B, 12/99

The voltage between the n-well and the source.

NOTE The n-well is the bulk of a P-MOSFET.

JESD90, 11/04

A unit that does not conform to a specification.

NOTE    See also “discrepant material”.

EIA-557-B, 2/06

The cumulative length of time that a component is not operating in an application.

NOTE    The nonoperating lifetime may be calculated by subtracting the power-on hours (POH) from the field lifetime.

JESD94A, 7/08

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