See "mega (as a prefix to units of semiconductor storage capacity)".

See "match".

A characterized fixed layout and interconnection of primitives that implement an electrical function.

NOTE Characterization may be done either by measurement of fabricated devices or by computer simulation or by both. Characterization may include the following aspects: physical dimensions, logic functionality, testability, layout-rule compliance, ac and dc electrical performance, and reliability.

An interconnection of primitives and/or macrocells that implements an electrical function but has no predetermined physical layout.

The main terminal intended by the thyristor manufacturer to conduct the control current in addition to the principal current.

NOTE Some bidirectional triode thyristors are completely symmetrical, e.g., SBS thyristors. For these, the choice for the manufacturer is arbitrary, and the user can return the control circuit to whichever main terminal will provide the required polarity of gate current.

The two terminals through which the principal current flows.

The maximum cumulative time after bake that components may be exposed to ambient conditions prior to shipment to the end user.

Acceptance testing of a change to a surface finish manufacturing process already accepted by a technology acceptance (q.v.).

A write transfer in which the transfer of new data from the serial register into the memory array is controlled by a write mask that is supplied on the DG(n) terminals. This mask allows the selective writing of new data into one or more of the data bit planes of the storage array corresponding to the data bits of the parallel array. In a normal implementation, a high M value enables the writing of new data while a low M inhibits the writing and leaves the existing data unchanged. A new mask value must be supplied for each masked write cycle.

A fixed-program read-only memory in which the data content of each cell is determined during manufacture by the use of a mask. (Ref. IEC 748‑2.)

An unmetalized wafer containing arrays of circuit elements as determined by subsystem requirements.

NOTE These circuit elements can be interconnected in a variety of ways to achieve different functions.

A pair of microwave diodes identical in outline dimensions and with matched electrical characteristics as described in EIA-370.

NOTE The two diodes may both be forward polarity, or one forward and one reverse polarity, or both reverse polarity.

Product that exhibits significant anomalous characteristics that may cause a higher-than-normal level of failure anywhere in the user's application or user's manufacturing line.

NOTE 1 In this definition, "product" includes the electronic component, the first level packing (e.g., tray, tube, and tape and reel), the shipping container, labeling, and paperwork.

NOTE 2 These significant anomalous characteristics can include initial quality defects, time-dependent reliability defects, defects that affect next level of manufacturing, defects in product delivery process (such as labeling or shipping media), and defects in business process (such as shipping information). The characteristics may or may not be part of an existing product or process monitor, test, or inspection activity.

NOTE 3 Maverick product may come from known noncompliant product, from compliant product that differs significantly from "typical" product (but is still within specification limits), or from "normal" product due to some previously unknown or unmonitored cause.

The maximum slope of the I_D-V_GS curve in the linear region.

NOTE 1 The gate voltage is varied in increments no greater than 20 mV from below the turn-on voltage to a value great enough to ensure that the maximum slope point has been reached.

NOTE 2 The slope is calculated using a three-point linear least-squares best-fit algorithm as defined in ASTM F617‑86.

The gate charge necessary to reach a specified maximum gate-source voltage.

NOTE The magnitudes of gate charge and voltage are referred to the coordinate origin (0,0).

The maximum supply voltage at which a device is specified to operate in compliance with the applicable device specification.

NOTE 1 "Maximum" refers to the magnitude of supply voltage and can be either positive or negative.

NOTE 2 The maximum operating voltage is not the absolute maximum-rated voltage, i.e., the voltage beyond which permanent damage is likely.

The peak positive or negative output voltage swing, referred to zero, that can be obtained without waveform clipping.

A rating that establishes either a limiting capability or a limiting condition beyond which damage to the device may occur. (Ref. IEC 747‑1.)

NOTE 1 A limiting condition may be either a maximum or a minimum.

NOTE 2 IEC 747‑1 refers to such a limiting condition as a "rating (limiting value)".

See "maximum operating (supply) voltage".

See "multiple-bit upset".

See "must connect low".

See "microcontroller" and "multiple-cell upset".

The mean value of the individual average junction temperatures, T_J(AV), of a sample of semiconductor devices when the devices are operated under specified life-test conditions.

The leak rate of a given package as measured under specified conditions and employing a specified test medium. Measured leak rate shall be expressed in units of atmosphere cubic centimeters per second (atm-cm³/s).

Time from removal of heating conditions to the start of the measurement sample window.

The middle value in a group of measurements when arranged from lowest to highest. When the number of measurements is an even number, the average of the two middle values is used as the median. A measure of location.

The smallest subdivision of a memory into which a unit of data has been or can be entered, in which it is or can be stored, and from which it can be retrieved. (Ref. IEC 748‑2.)

A subdivision of a memory, including one or several memory cells, that is the smallest part of the memory that can be addressed.

NOTE The content of a memory location is usually called a bit, a byte, or a word, as appropriate.

See "metal-semiconductor field-effect transistor".

A technology for producing circuits and circuit elements having the form of a semiconductor-insulator-metal layered structure.

NOTE Field-effect transistors, capacitors, varactors, nonlinear resistors, variable-threshold diodes, and similar circuit elements can be produced with this technology.

The metallization on the bottom surface of a chip that permits bonding it to a mounting substrate.

A subcategory of metal-insulator-semiconductor (MIS) technology in which the insulation employed is a nitride-oxide layer.

A subcategory of metal-insulator-semiconductor (MIS) technology in which the insulator employed is an oxide of the semiconductor substrate material.

NOTE The term MOS is often misused to include other categories of insulated-gate technology such as MNOS (metal-nitride-oxide-semiconductor) and SIS (silicon-gate-insulator semiconductor).

A field-effect transistor in which a metal-semiconductor rectifying contact is used for the gate electrode.

NOTE 1 Typically the structure is fabricated in gallium arsenide and the term GaAs MESFET may be used.

NOTE 2 Both depletion-type and enhancement-type devices have been manufactured. The acronyms are D-MESFET and E-MESFET, respectively.

A code assigned by JEDEC that identifies manufacturers. JEP-106 is the publication containing the codes.

Synonym for "integrated circuit, analog".

Synonym for "integrated circuit, digital".

Synonym for "integrated circuit, hybrid".

Synonym for "integrated circuit, linear".

An assembly of microcircuits, or an assembly of microcircuits and discrete parts, designed to perform one or more electronic circuit functions and so constructed that, for the purpose of specification, testing, commerce, and maintenance, it is considered to be indivisible.

A computer system whose central processing unit (CPU) is a microprocessor.

NOTE A basic microcomputer includes a microprocessor, memory, and input/output ports; these may or may not be on the same chip. See also "microcontroller".

An assembly of unpackaged (uncased) microcircuits and/or packaged microcircuits so constructed on a packaging interconnect structure that it is considered to be an indivisible component for the purpose of specification, testing, commerce, and maintenance.

NOTE The assembly may also include discrete devices. These and the microelectronic devices may be mounted on either one or two sides of the packaging interconnect structure, and the external terminals usually exit from one side of the assembly. Various package sizes, shapes, and external terminal forms may be used.

The name sometimes used for the central processing unit (CPU) of a microcomputer.

A computer in which the microprogram (microinstructions) in the read-only memory (ROM) used for instruction decoding can be changed, thus changing the computer's instruction set.

A specified analog value within a step that is ideally represented free of error by the corresponding digital output code.

Any product that is offered to customers by the manufacturer for use in US military and similar types of system applications (e.g., QPL, QML, MIL-STD-883, standard microcircuit drawings, specification or source control drawings, selected or altered item drawings).

The process of eliminating redundancy in logic implementation.

The minimum supply voltage at which a device is specified to operate in compliance with the applicable device specification.

See "metal-insulator-semiconductor technology".

A diode, often associated with microwave circuits, that combines rf signals at two frequencies to generate an rf signal at a third frequency.

See "mode select".

The most frequently occurring value in a group of measurements. A measure of location.

A representation of an electronic circuit.

Input signals that, when true, select an alternative mode of operation for the device. The alternative modes available must be defined in the applicable device standard.

A metal-semiconductor field-effect transistor in which a doped material forms a heterojunction with an undoped channel; the doped material supplies electrons to the undoped channel whose high electron mobility results in enhanced channel conductance.

NOTE 1 Typically an aluminum gallium arsenide layer is grown on an undoped gallium arsenide layer by an epitaxial growth technique.

NOTE 2 Other popularly used acronyms for this device are HEMT for high-electron-mobility transistor, SDHT for selectively doped heterostructure transistor, and TEGFET for two-dimensional electron-gas field-effect transistor.

A bag designed to restrict the transmission of water vapor and used to pack moisture-sensitive devices.

A property of the transfer function that ensures the consistent increase or decrease of the digital [analog] output in response to a consistent increase or decrease of the analog [digital] input.

NOTE An intermediate increment with the value of zero does not invalidate monotonicity.

The structural characterization of an electronic component in which the areas or patterns of resistive, conductive, dielectric, and active materials in or on the surface of the structure can be identified in a one-to-one correspondence with devices assembled to perform an equivalent function.

See "metal-oxide-semiconductor technology".

See "metal-oxide varistor".

See "multiport memory".

See "microprocessing unit".

See "rated moisture sensitivity level".

See "main terminal 2".

A transistor having a base and two or more junctions.

Graphic symbols for triode transistors (ref. IEEE Std 315):

NOTE In the graphic symbols, the envelope is optional if no element is shown connected to the envelope.

A multiple-cell upset (MCU) in which two or more error bits occur in the same word.

NOTE An MBU cannot be corrected by a simple single-bit ECC.

A term describing a device that has pins used for different purposes at different times as a function of one or more of its control inputs. The signal groups that are multiplexed onto a common pin set are given together, as in AA MX signifying address multiplexed with address or ADQ MX signifying address multiplexed with data in and data out.

A dynamic RAM that contains, in addition to the conventional random-access data and address port, a serial-access port that allows serial access to a portion of the stored data in a way that is independent of the normal RAM data terminals and in which simultaneous serial and random operations may be executed. This type of memory has been referred to as "Video RAM" because of its primary field of application.

A RAM that has two or more ports for data, address, and control, that are not identical in nature. Normally at least one port provides parallel access while one other provides serial access. (See also "synchronous MPDRAM (SMPDRAM)".)

A pin that must be connected to a voltage that is interpreted as a logic low or "false" signal.

See "multiplexed".

Solder paste, lead/terminal finish, or terminal material/alloy of the solder balls used to make the 2^nd level interconnect.

See “multi-chip package”.

The average time to failure for components or nonrepairable systems.

Using a program for observing, and often controlling, a device or equipment.

See “mean-time-to-failure”.