The condition attained when the electrical parameter under consideration approaches a value that cannot be altered by further irradiation shielding.

A variation of the dark current that exceeds some specified level above the average value.

A method, used to determine whether the write operation in a memory is complete, wherein the memory is put into the read mode after initiating the write mode; if writing is complete, the outputs take on the addressed stored data, or if writing is not complete, the specified output(s) take on the complement of the last bit(s) written.

NOTE If writing is not complete: (a) in older devices, normally all outputs take on the complement of the last bits written; (b) in more modern byte-wide memories, only the most significant output takes on the complement of the last bit written; (c) in word-wide memories, the most significant output of the least significant byte, the most significant output of the entire word, or both of these outputs take on the complement of the last bit written.

An event in which at least one bit of data is caused to change.

NOTE This event may be used as a unit of endurance for erasable programmable read-only memories.

Those inputs whose states represent the data that is to be written into the selected address on a write cycle of an alterable memory device. When the numbering of the data inputs is significant for device operation, the data inputs are numbered beginning with 0. In devices where data bit groupings have independent control, an additional suffix "x" is applied. "x" takes the values of a, b, c, etc.

The outputs whose states represent the data read from the selected cells. When the device is not selected or enabled, the outputs are usually in a floating (Z, high-impedance) state. When the numbering of the data outputs is significant for device operation, the data outputs are numbered beginning with 0. In devices where data bit groupings have independent control, an additional suffix "x" is applied. "x" takes the values of a, b, c, etc.

A value that is either observed or calculated.

The supply current in the data-retention mode.

Synonym for "retention time".

The input of a device having both serial and parallel access ports that, depending on the state of one or more of the other control lines of the device, either enables an internal data transfer between the serial and parallel port circuitry or enables the data outputs of the parallel port.

The physical portion of a part that, in conjunction with suitable tooling, establishes the datum.

NOTE A centerline, by itself, cannot be a datum. It must be the centerline of a physical feature such as a hole or boss, etc. In these cases, it is the diameter of the hole or the width of the boss that is designated as the datum. The point of reference is the centerline of these physical features.

A circuit that produces, from a dc input, a dc output that is proportional to a control input.

The total dc power supplied to a device less any power delivered from the device to a load.

A test during which only steady-state voltages and currents are applied to the device.

NOTE DC tests are generally used to determine input levels, output levels, or dissipation characteristics of devices.

A localized imperfection or deviation from the designed construction that affects function.

A failure found during tensile pull of flip chip solder joints, where the solder bump interconnection metallization is at least partially removed from either the substrate or the die, with the solder bump remaining continuous.

The time interval between the instant when the digital input changes and the instant when the analog output passes a specified value that is close to its initial value, ignoring glitches.

NOTE For a multiplying digital-to-analog converter, the full term and the additional subscript d must be used to distinguish between the digital and the reference delay times.

An assessment of the metrics established to evaluate delivery of product.

Synonym for "space-charge region, emitter(-base)".

A field-effect transistor having appreciable channel conductance for zero gate-source voltage; the channel conductance may be increased or decreased according to the polarity of the applied gate-source voltage. (Ref. IEC 747‑8.)

The deposition of conductive, resistive, insulating, or semiconductor films onto a substrate from a source material in the vapor phase by physical deposition or chemical reaction.

An absorbent material used to maintain a low relative humidity.

(1) An efficient method of experimentation that identifies factors that affect the mean and variation with minimum testing.

(2) A systematic approach to varying the input-controllable variables in the process and analyzing the effects of these process variables on the outputs. When employed in conjunction with statistical process controls, it can minimize process variability.

A functional fault for which a test pattern can be created that will always cause the effects of the fault to be observable at an externally accessible node.

A diode, often associated with microwave circuits, that converts rf energy into dc or video output.

The difference in height between the highest point and the lowest point on the package body bottom surface measured with respect to the seating plane.

NOTE Contrast with "deviation from coplanarity".

A condition that results when molten solder coats a surface and then recedes to leave irregularly-shaped mounds of solder that are separated by areas that are covered with a thin film of solder and with the basis metal not exposed. (Ref. IPC‑T‑50.)

The input that, on some devices, invokes and controls any built-in diagnostic test features.

Synonym for "chip (1)".

A central metalplate, often used in a semiconductor package to support the active device.

The process or method of physically mounting a chip on a surface, substrate, header, etc.; also known as "die attach(ment)" or "chip attach(ment)".

A chip-scale package whose area is generally equal to the area of the semiconductor device it contains.

NOTE 1 Usually, but not necessarily, some portion of the silicon IC is exposed. The device is then also an uncased device.

NOTE 2 The package size will change with changes in the size of the die.

The particle flux density per unit energy incident on a surface; i.e., the number of radiant-energy particles incident on a surface during a given period of time divided by the product of the area of that surface, the characteristic energy of the incident particles, and the given period of time.

NOTE 1 The term "differential flux" is used in JESD89A whereas other standards use the term "differential flux density" for the same meaning.

NOTE 2 The equation "differential flux density = N/(A∙E∙t)" applies, where N, A, E, and t represent the quantities number of particles, area, energy, and time.

NOTE 3 The unit symbol (e.g., cm^‑²∙MeV^‑1∙s^‑1) does not identify particle type. The particle name may be placed before the term, e.g., "proton differential flux", or in the spelled-out unit name, e.g., "protons per square centimeter megaelectronvolt second".

NOTE 4 The use of the terms "spectral flux" and "spectral flux density" for this concept is deprecated because "spectral" usually applies only to a specific wavelength, wavelength band, or function of wavelength.

The voltage applied between two input terminals of a circuit.

A pair of ungrounded output terminals between which the output signal appears.

θ = dT/dP

A process used to introduce desired impurities into a semiconductor crystal to alter its electrical properties; it is accomplished by introducing suitable dopants to the surface of the semiconductor wafer under precisely controlled conditions, usually at high temperatures.

A converter that represents a limited number of different digital input codes by a corresponding number of discrete analog output values.

NOTE Examples of input code formats are straight binary, 2s complement, and binary‑coded decimal.

Synonym for "diode, Schottky".

A diode formed by depositing a metal film on a semiconductor surface of sufficiently high resistivity to form an energy barrier.

NOTE A Schottky diode is sometimes used as part of a bipolar transistor structure.

See "dual-in-line package".

The time interval between the transition of the disabling signal and the instant when the supply current has decreased from its active value to its maximum standby value.

NOTE This interval is defined with respect to specified reference points on the chip-enable and supply-current waveforms.

The propagation time between specified reference points on the input and output voltage waveforms with the output changing from the defined low level to a high-impedance (off) state.

NOTE 1 See note 1 to "disable time from the high level …".

NOTE 2 Because L-type open-circuit outputs are used with pull-up components that cause the outputs to go high when the outputs are turned off, the term "low-to-high-level propagation time" and the symbol t_PLH are frequently used with these outputs for this parameter.

The propagation time between specified reference points on the input and output voltage waveforms with the output changing from either of the defined active levels (high or low) to a high-impedance (off) state.

The transition time between specified reference points on the output voltage waveform with the output changing from the defined low level to a high-impedance (off) state.

NOTE 1 See note 1 to "disable time from the high level …".

NOTE 2 Because L-type open-circuit outputs are used with pull-up components that cause the outputs to go high when the outputs are turned off, the term "low-to-high-level transition time" and the symbol t_TLH are frequently used with these outputs for this parameter.

A state in a switch device characterized by a high series impedance of the designated electrical path.

Material that does not conform to specifications.

A technique for interconnecting subarrays on a single wafer in which each subarray is electrically tested by probing and the desired array function is attained by the use of a metallization pattern that connects only usable subarrays.

A package shaped like a disk or button whose terminals exit radially from the periphery of the disk (like spokes of a wheel) or axially from the center of the disk.

Displacement of atoms in the silicon lattice caused by their interaction with incident neutrons, protons, or other energetic particles or ions.

The loss or removal of metallization from an area on the basis or substrate material during immersion in molten solder.

See "data input".

A chemical element that is introduced into the lattice structure as an impurity to form desired properties.

NOTE Examples are phosphorus and boron used to create n- and p-regions, respectively, in silicon.

The disruption of a device caused by a high-intensity pulse of ionizing radiation that produces a change in stored data, a change of operating state, or a transient output signal that is large enough to affect other circuit elements.

A technology for producing silicon-gate metal-oxide semiconductor field-effect transistors such that 1) the threshold voltage, V_T, is determined by the intersection of two doping profiles, and 2) the device channel length is defined by the diffusion characteristics rather than by a photolithographic self-aligned gate structure.

A circuit in which the current flows in both directions from each terminal of the alternating-voltage circuit to the rectifier circuit elements connected to each terminal.

See "dual-port memory".

See "input/output data mask".

A region into which majority carriers flow from the channel.

The direct current into the drain terminal of a depletion-type transistor with a specified reverse gate-source voltage applied to bias the device to the off-state.

The drain current when the transistor is biased in its off state.

NOTE I_D(leak) may have contributions from channel off-state current, gate-induced drain leakage, and drain-to-gate tunneling currents.

A collection region that acquires principal-current charge carriers from a channel, the current being due to a voltage applied to the drain.

NOTE This definition applies for the actual operating mode of the device regardless of the name of any associated terminal.

The dc voltage between the drain terminal and the source terminal.

The specified externally available point of connection to the drain region.

The maximum absolute change in a parameter over a period of time.

NOTE The change may or may not be normalized to the initial value of the parameter. The specific term should be "(parameter) drift".

See "double-buffered read transfer".

See "data-transfer/output-enable input"

A device package configuration that has two parallel rows of pins that are spaced nominally 0.3 inch, 0.4 inch, or 0.6 inch apart with the pins on 0.1-inch centers.

NOTE See also "in-line package".

Any memory that has two essentially identical data ports.

Data transmission in both directions simultaneously. (Ref. ANSI X3.172.)

The magnitude of the deviation in time duration between the primary threshold crossing and the secondary threshold crossing in a cycle over a random sample of cycles.

See "design validation/verification".

A dynamic memory that permits access to any of its address locations in any desired sequence with similar access time to each location.

A volatile read/write memory in which the cells require the repetitive application of control signals generated inside or outside the integrated circuit to retain stored data. (Adapted from IEC 748‑2.)

NOTE 1 The words "read/write" may be omitted from the term when no misunderstanding is likely.

NOTE 2 Each repetitive application of the control signals is normally called a refresh operation or cycle.

NOTE 3 A dynamic memory can use static addressing or sensing circuits.

NOTE 4 Contrast with "static (read/write) memory".

A physical anomaly that adversely affects function or performance.