See "port A; port B".

See "bit".

A synonym for "bias charge", used mainly in imaging devices.

The interface between the encapsulant and the back of the substrate within the outer edges of the substrate surface. (Refer to Type IV in Annex A of J‑STD‑035.)

An amplifier in which the quiescent dc output voltage (or, if the output is a differential output, the difference between the two quiescent dc output voltages) has been reduced to zero or other specified level.

A package in which the external connections to the package are made via a rectangular array of ball-type connections, all on a common plane.

NOTE See also "grid array package".

The range of frequencies within which the maximum output voltage swing is above the specified value at a specified load impedance.

In a RAM that has multiple banks in its architecture, the address used to select any one of the available banks.

See "saturation voltage, base-emitter".

The overall combination of base region, base terminal, and the interface between them.

NOTE This term should be used in this manner only when no confusion is likely to occur.

A plane parallel to the seating plane through the lowest point on the body of the package. It may coincide with the seating plane.

A region of a semiconductor device into which majority carriers are injected.

The specified externally available point of connection to the base region.

A plot of failure rate versus time or cycles that exhibits three phases of life: infant mortality (initially decreasing failure rate), intrinsic or useful life (relatively constant failure rate), and wear-out (increasing failure rate).

A unit of signaling speed equal to the number of discrete conditions or signal events per second. (Ref. ANSI X3.172.)

NOTE For example, one baud equals one bit per second in a train of binary signals or one 3‑bit value per second in a train of signals each of which can assume one of eight (2³) different states.

See "buried-channel charge-coupled device".

A BiCMOS series that includes devices whose input logic levels are TTL-compatible and whose outputs are specified at TTL levels; the low-level output voltage is specified at 24 mA and 48 mA.

See "burst DRAM".

The flux densiy of a beam (see "flux density").

The algorithms or equations defining a function.

See "byte-mode enable".

(1) A voltage or current applied to an electronic device to establish a reference level for operation.

(2) The difference between the mean (or expectation) of an estimator, T, and the true value, θ, of a parameter: E(T) - θ.

See "bipolar-and-CMOS technology".

A thyristor surge protective device having substantially the same switching characteristics in the first and third quadrants.

The format in which the most significant bit of a word is transferred first and the least significant bit is transferred last.

A specific discrete probability distribution for attributes data.

A technology for combining bipolar transistors and silicon-gate complementary metal-oxide-semiconductor (CMOS) field-effect devices in a single-chip integrated circuit.

A technology for combining bipolar transistors and metal-gate metal-oxide-semiconductor (MOS) or metal-gate complementary metal-oxide-semiconductor (CMOS) field-effect devices in a single-chip integrated circuit.

A technology for producing devices in which electrical conduction depends on the flow of both majority and minority carriers.

A sequential logic function that has two and only two stable internal output states. (Ref. ANSI/IEEE Std 91.)

In a semiconductor memory device having a data interface that is wider than one bit, those storage cells and associated circuitry that are associated with a given bit in the data interface.

A central processing unit constructed of an array of identical units, each of which operates simultaneously upon one or more adjacent bits. (Ref. IEC 824.)

Ideally, a body that would absorb all and reflect none of the radiant energy falling upon it; its reflectivity would be zero and its absorptivity (and consequently, its emissivity) would be 100%. In practice, a radiator of uniform temperature whose radiant emittance in all parts of the spectrum is the maximum obtainable from any radiator at the same temperature, or a radiator whose spectral radiant emittance conforms with Planck's law of radiation.

A term describing the state of a semiconductor device or junction that imposes high resistance to the passage of current.

A group of input signals that enable individual bit blocks of the data interface.

A block-write cycle in which the data written is also controlled by the write mask supplied on the DQ(n) terminals in that cycle.

See "acoustic data, B-mode".

The semiconductor portion of a device limited by the physical extent of the crystalline or amorphous semiconductor material and including any associated oxide layers and metallization.

(1) The adhesion or welding of a thin wire, usually gold, to a die pad metallization, usually an aluminum alloy, using a thermosonic wire-bond process. The ball bond includes the enlarged spherical, or nail-head, portion of the wire (provided by the flame-off and first bonding operation in the thermocompression and thermosonic process, or both), the underlying bonding pad, and the ball bond-bonding pad intermetallic weld interface.

(2) A thermocompression bond in which the attachment wire has been fed through a capillary tube and its exposed end melted into a ball that has been attached under pressure to the bonding pad.

Synonym for "semiconductor chip bond".

Either the die-pad metallization or the package surface metallization to which the wire is ball-, wedge-, or stitch-bonded.

A process in which an instrument uses a chisel-shaped tool to shear or push a ball or wedge bond off the bond pad (see figure below). The force required to cause this separation is recorded and is referred to as the bond shear force. The bond shear force of a gold ball bond, when correlated to the diameter of the ball bond, is an indicator of the quality of the metallurgical bond between the gold ball bond and the bond pad metallization. The bond shear force of an aluminum wedge bond, when compared to the manufacturer's tensile strength of the wire, is an indicator of the integrity of the weld between the aluminum wire and the bond pad or package surface metallization.

A separation of the wire bond where 1) a thin layer of the bonding surface metallization remains with the wire bond and an impression is left in the bonding surface, 2) intermetallics remain on the bonding surface and with the wire bond, or 3) a major portion of the wire bond remains on the bonding surface.

A condition produced when the shear tool contacts the bonding surface. This condition may be due to improper placement of the specimen, a low shear height, or instrument malfunction. This bond shear type is not acceptable; the shear value is invalid and shall be eliminated from the shear data.

A separation between the bonding surface metallization and the underlying substrate or base material. There is evidence of bonding surface metallization remaining attached to the ball or wedge bond.

A bond in which two members are joined through the combined application of heat and pressure.

A thermocompression bond in which a wedge-shaped tool is used to apply pressure to the wire being attached.

A design methodology in which the I/O buffers of a circuit or functional block are observed and controlled by scan cells.

NOTE The Boundary Scan standard was developed by the Joint Test Action Group (JTAG) and is embodied in IEEE Standard 1149‑1.

A current in a breakdown region.

The portion of the voltage-current characteristic beyond the initiation of breakdown for an increasing magnitude of reverse current.

The breakdown voltage between the collector and base terminals when the collector terminal is biased in the reverse direction with respect to the base terminal and the emitter terminal is open-circuited.

The breakdown voltage between the drain terminal and the source terminal when the gate terminal is short-circuited to the source terminal.

The breakdown voltage between the drain terminal and the source terminal when the gate terminal is returned to the source terminal through a specified voltage.

The breakdown voltage between the gate terminal and the source terminal with a reverse gate-source voltage applied and the drain terminal short-circuited to the source terminal.

NOTE The symbol V_(BR)GSSF should be used with insulated-gate transistors having shunting diodes or similar voltage-limiting devices.

The breakdown voltage between the gate terminal and the source terminal with a forward gate-source voltage applied and the drain terminal short-circuited to the source terminal.

NOTE The symbol V_(BR)GSSR should be used with insulated-gate transistors having shunting diodes or similar voltage-limiting devices.

Synonym for "full-bridge (output)".

See "block select".

(1) An isolating circuit used to minimize the effects of a driven circuit on the driving circuit. (Adapted from ANSI/.and ANSI X3.172.)

(2) A routine or storage used to compensate for a difference in the rate of flow of data or in the time of occurrence of events, when transferring data from one device to another. (Ref. ANSI X3.172.)

Storage used to compensate for a difference in the rate of flow of data between components of an automatic data processing or communications system, or in the time of occurrence of events in the components. (Adapted from ANSI X3.172.)

Synonym for "buried-channel charge-coupled device".

The direct current into the bulk contact.

The dc bulk-to-source voltage.

A charge-coupled device that confines the flow of charges to a channel lying beneath the surface of the semiconductor.

A DRAM that has burst-mode-data capability.

A line driver used for fan-out to multiple receivers via a transmission line.

The output that, on some devices, signifies that some internal asynchronous operation is still in process and that the device is not available for normal functions. This signal is normally implemented so that multiple devices can be OR-tied.

See "bandwidth".

See "block write with new mask".

A device name (e.g., BDRAM) whose first letter (B) indicates that the device has a "burst" data capability.

(1) A binary character string operated upon as a unit and usually shorter than a computer word. (Ref. ANSI X3.172.)

NOTE A byte is usually eight bits.

(2) The unit of storage capacity equal to eight bits.

A device that has a parallel data interface of eight bits, possibly with additional bits appended to provide parity or error-detection capability.

The breakdown voltage between the collector and emitter terminals when the collector terminal is biased in the reverse direction* with respect to the emitter terminal, and the base terminal is, respectively,

• open-circuited.
• short-circuited to the emitter terminal.

• returned to the emitter terminal through a specified circuit.

• returned to the emitter terminal through a specified resistance.

• returned to the emitter terminal through a specified voltage.

*For these parameters, the collector terminal is considered to be biased in the reverse direction when it is made positive for npn transistors or negative for pnp transistors with respect to the emitter terminal.

The breakdown voltage between the collector and emitter terminals when the collector terminal is biased in the reverse direction* with respect to the emitter terminal, and the base terminal is, respectively,

• open-circuited.
• short-circuited to the emitter terminal.

• returned to the emitter terminal through a specified circuit.

• returned to the emitter terminal through a specified resistance.

• returned to the emitter terminal through a specified voltage.

*For these parameters, the collector terminal is considered to be biased in the reverse direction when it is made positive for npn transistors or negative for pnp transistors with respect to the emitter terminal.

The breakdown voltage between the collector and emitter terminals when the collector terminal is biased in the reverse direction* with respect to the emitter terminal, and the base terminal is, respectively,

• open-circuited.
• short-circuited to the emitter terminal.

• returned to the emitter terminal through a specified circuit.

• returned to the emitter terminal through a specified resistance.

• returned to the emitter terminal through a specified voltage.

*For these parameters, the collector terminal is considered to be biased in the reverse direction when it is made positive for npn transistors or negative for pnp transistors with respect to the emitter terminal.

The portion of the semiconductor processing line that creates the conductive lines carrying power and signals between devices and to the interface connecting off-chip.

A two-terminal ABD with a voltage-current avalanche breakdown characteristic in both directions, which can be either symmetrical or asymmetrical.

NOTE    Large transient currents will be clamped for voltage of either polarity across two similar p-n junctions in series connected in opposite directions. During a transient current event in this operating mode, one of the two p-n junctions is always in avalanche breakdown and the other is in the forward-conducting, low-voltage mode. The voltage across the bidirectional ABD is the sum of these two voltages. The avalanche breakdown voltage is substantially the same in both directions for a symmetrical bidirectional ABD; however, it may also be intentionally different or asymmetrical by design for special applications. Since multiple p-n junction capacitances in series reduce the overall total capacitance, the bidirectional ABD has lower capacitance than its unidirectional counterpart.

Bidirectional ABD symbol options