A shortened form of a word or expression.

The maximum junction temperature of an operating device, beyond which damage (latent or otherwise) may occur.

The maximum voltage that may be applied to a device, beyond which damage (latent or otherwise) may occur.

A BiCMOS series that includes devices whose input logic levels are TTL-compatible and whose outputs are specified at TTL levels.

An error rate obtained in the presence of an ionizing radiation source.

The acceleration factor due to the presence of some stress (e.g., current density, electric field, humidity, temperature cycling).

The acceleration factor due to changes in voltage.

A sampling inspection or series of sampling inspections used to determine the suitability of a lot of material for shipment.

The time interval between the application of a specific input pulse and the availability of valid signals at an output.

A register in which one operand of an operation can be stored and subsequently replaced by the result of another operation. (Ref. IEC 824.)

The maximum transient or pulse voltage amplitude of extraneous signal that can be algebraically added to the noise-free worst-case input level without causing the output voltage to deviate from the allowable logic voltage level.

Acoustic data collected along an X-Z or Y-Z plane versus depth (Z) using a reflective acoustic microscope. A B-mode scan contains amplitude and phase/polarity information as a function of time of flight at each point along the scan line. A B-mode scan furnishes a two-dimensional (cross-sectional) description along a scan line (X or Y).

Example of B-mode display (bottom half of picture on left)

Acoustic data collected in an X-Y plane throughout the depth (Z) using a through-transmission acoustic microscope. A through-transmission mode scan contains only amplitude information at each point in the scan plane. A through-transmission scan furnishes a two-dimensional (area) image of transmitted ultrasound through the complete thickness/depth (Z) of the sample or component.

Example of through-transmission display

The process of verifying the specified timing of a device.

NOTE Testing of propagation delays, minimum setup and hold times, minimum pulse durations, etc., can be performed by using test vectors applied at the specified operating frequency of the device. Propagation delays of critical logic paths for system operation can be measured individually.

See "circuit element, active".

A device in which at least one circuit element is an active circuit element.

A bipolar (three-state or totem-pole) output whose source-current capability significantly exceeds its sink-current capability.

The time it takes for the structure resistance to reach or exceed R_fail while the structure is under stress from the isothermal test algorithm.

See "analog-to-digital [A/D] converter".

The pins that are multiplexed three ways to serve as address input, data input, and data output pins. When the address data input/output numbering is significant for device operation, the addresses are numbered beginning with 0.

An input that, when true, allows the input address to be entered into a register and, when false, causes the address state previously entered to be latched.

See "address data input/output".

See "address latch enable".

The number of alpha particles that decay in an alpha source per unit time.

NOTE The preferred SI unit is the becquerel (Bq); to convert from the curie, multiply by 3.7 × 10¹⁰ (exactly).

The air temperature measured below a device, in an environment of substantially uniform temperature, cooled only by natural air convection and not materially affected by reflective and radiant surfaces.

See "address inputs".

A converter that uniquely represents all analog input values within a specified total input range by a limited number of digital output codes, each of which exclusively represents a fractional part of the total analog input range.

NOTE This quantization procedure introduces inherent errors of ±½ LSB (least significant bit) in the representation because, within this fractional range, only one analog value can be represented free of error by a single digital output code.

A statistical tool that allows for the comparison of more than two groups of data and provides valid assumptions. Computations of ANOVA involve partitioning total variation into two components: the variation from differences among group "means", and random variations within the groups known as "error". ANOVA provides for reliable results even when certain assumptions are violated.

The voltage between the anode and cathode terminals.

NOTE The anode-cathode voltage is called "positive" when the anode potential is higher than the cathode potential and called "negative" when the anode potential is lower than the cathode potential.

The terminal connected to the p‑type region of the p‑n junction or, when two or more p‑n junctions are connected in series and have the same polarity, to the extreme p‑type region.

NOTE 1    See note to “anode”.

NOTE 2    This definition does not apply to current-regulator diodes.

NOTE 3    For voltage-reference diodes, any temperature-compensating diodes that may be included shall be ignored in the determination of the anode terminal.

NOTE 4    For unidirectional blocking or low-capacitance ABDs, any rectifier diode(s) that may be included are ignored in the determination of the anode terminal.

(2) (of a current-regulator diode): The terminal to which current flows from the external circuit when the diode is biased to operate as a current regulator.

(3) (of a unidirectional diode thyristor): The terminal to which the current flows from the external circuit when the thyristor is in the on state.

(4) (of a unidirectional triode thyristor): The main terminal to which the principal current flows from the circuit being controlled when the thyristor is in the on state.

NOTE A second anode terminal may be provided for connecting to the control circuit of an n‑gate thyristor.

Material that inhibits triboelectric charging.

NOTE The antistatic property of a material is not necessarily correlatable with the resistivity or resistance of the material.

(1) An equivalent activation energy on the basis of which the time-to-failure distribution of a complex structure, e.g., a transistor or an integrated circuit, can be estimated.

NOTE 1 Apparent activation energy refers to the apparent shift in the time-to-failure distribution of some product as a function of temperature.

NOTE 2 The apparent activation energy is associated with a distribution of the time to failure for a given mechanism. The summation of the actual physical processes, with various possible thermal activation energies to create the mechanism, is reflected in the distribution.

(2) An equivalent energy value that can be inserted in the Arrhenius equation for reliability to calculate an acceleration factor applicable to changes with temperature of time-to-failure distributions.

NOTE 1 An apparent activation energy is often associated with a specific failure mechanism and time-to-failure distribution for calculating the acceleration factor.

NOTE 2 A composite apparent activation energy is often used to calculate a single acceleration factor, for a given time-to-failure distribution, that is equivalent to the net effect of the various thermal acceleration factors associated with multiple failure mechanisms.

NOTE 3 Various physical thermal activation energies may contribute to the shape of the time-to-failure distribution.

NOTE 4 The term "apparent" is used because Eaa is analogous in use to Ea in the Arrhenius equation; Eaa is used for a time-to-failure distribution, while Ea applies to a chemical thermal reaction rate.

(3) An activation energy that is calculated using the principles of the physical relationship between stress and failure rate but is not directly related to a basic change in physical processes.

NOTE 1 Apparent activation energy may be based on many effects that produce a cumulative result when the device is stressed. It is similar to the concept of activation energy but relates to the probability of not exceeding some measurable attribute.

NOTE 2 A plot of the reciprocal or absolute temperature (1/T(K)) versus the log of percent failed is linear for the lognormal distribution.

An integrated circuit developed and produced for a specific application or function and for a single customer.

NOTE ASICs generally use standard cell or gate array design methodology.

The full environmental and/or operating ranges that the application is specified to function within.

The part of a processor that performs arithmetic operations. (Ref. IEC 824.)

NOTE This term is sometimes used for a unit that performs both arithmetic and logic operations.

Synonym for "gate array integrated circuit".

See "auto-load read transfer".

See "accelerated soft error rate".

The state of a component that has been attached to a second-level assembly.

Synonym for "special cause".

See "application-specific standard product".

A circuit whose changes of state are not controlled by a single clock.

See "actual time to fail".

An input that, when active (low), selects the attribute memory and, when inactive (high), selects the main memory for normal access.

NOTE Attribute memory is a separately accessed section of memory on the card and is generally used to record capacity and other configuration and attribute information. Main memory is used to store user data.

The introduction of impurities from the substrate into the epitaxial layer during the process of epitaxy.

A split serial-access memory (SAM) data register transfer in which the transfer from each half is automatically triggered by the state of the tap pointer counter after each half of the SAM register is filled.

A terminal, other than an ac, dc, or control terminal, that may be provided for a specified purpose.

The peak current reached repetitively during device avalanche in an inductive-load switching circuit.

The time duration of device avalanche.

A transient voltage suppressor that is a semiconductor diode with a single p‑n junction (or with multiple p‑n junctions none of which interact) and employs its breakdown characteristics as part of its function.

The effective (constant) device drain-source breakdown voltage during avalanche. The instantaneous device breakdown voltage will change with junction temperature during a test. V_DSX(sus) can be calculated from a measurement of the avalanche duration, t_av.

The n^th root of overall charge-transfer efficiency, where n is the number of transfers.

The average dark current per unit area within the active area of the device.

NOTE Depending on the type of device, the active area may be defined as either the area of transfer channel or the overall area including channel-defining regions. Other names used are "average leakage current density" and "average thermal generation current density".

The ratio of (1) the total output noise power within an output frequency band when the noise temperature of all input terminations is at the reference noise temperature, T₀, at all frequencies that contribute to the output noise to (2) that part of (1) caused by the noise of the signal-input termination within the signal-input frequency band. (Ref. IEC 747‑1.)

NOTE 1 The abbreviation is often used in place of symbol ; however, symbol is preferred.

NOTE 2 This ratio may be expressed logarithmically in decibels (dB).

See "pulse duration, average".

The average temperature rise in the test line, ΔT, divided by power input, ΔP, as a result of passing current through the force terminals of the structure:

θ = ΔT/ΔP.

After convergence to target stress temperature, this parameter is optionally used in the feedback algorithm.

See "auto-load write transfer".

A transient voltage suppressor that is a semiconductor diode with a single p-n junction (or with multiple p-n junctions none of which interact) whose operation depends in part on its breakdown characteristics.