Roy Greeff, Micron Technology, Inc.
JEDEC Signaling Task Group Lead
Mr.
Greeff is Signal Integrity Group Manager for Micron Technology's Systems
Memory Group. He is responsible for the signal integrity of future memory
systems and the DRAM standards required for I/O specifications. Mr. Greeff
has more than 25 years of radio frequency and communications experience
and is listed as an inventor on various patents associated with microwave
communications, RFID, and memory systems.
Joe Jeddeloh, Micron Technology, Inc.
JEDEC Protocol Task Group Lead
As
General Manager of Advanced Systems Technology, Mr. Jeddeloh is responsible
for memory interfacing products and system design for Micron Technology.
He is listed as an inventor on more than 70 patents in the area of memory
system design.
George Pax, Micron Technology, Inc.
JEDEC Module Design Task Group Lead
As
the manager responsible for the development of future memory technologies
at Micron Technology, Mr. Pax attends JEDEC meetings and oversees the
design of prototype hardware to test different technologies. He is listed
as an inventor on a total of 34 DRAM- and RFID-related patents.
Kevin Kilbuck, Micron Technology, Inc.
Advanced Server Segment Marketing Manager
Mr.
Kilbuck is Strategic Marketing Manager for Micron Technology's Systems
Memory Group. His current responsibilities focus on the development of
memory products and enabling activities for high-performance computing
applications. He has more than 17 years of experience in the areas of
applications engineering and marketing for memory products.
Register
today to attend the FBDIMM Tutorial at JEDEX San Jose on
March 31!
*JEDEC has not yet adopted and published a final FBDIMM
standard.
© 2005 Micron Technology, Inc.. All rights reserved. Micron and the Micron
logo are trademarks of Micron Technology, Inc.. All other trademarks are
the property of their respective owners. Information is subject to change
without notice.
|