JC-63 defines/proposes standards for mixed-technology MCP that address unique electrical, mechanical, test, and architecture issues relating to die-to-die design and manufacturing for commercial applications.
MCP is defined as multichip package, a single package that contains multiple dice, including memory-memory, logic-memory, logic-logic, and/or passive components.
|Multichip Packages (MCP)||MCP3_12_01||Jan 2013|
|Package-on-Package (PoP) and Internal Stacked Module (ISM)||MCP3_12_02||Jan 2012|
|LOW POWER DOUBLE DATA RATE 2 (LPDDR2)||JESD209-2E||Apr 2011|
|Silicon Pad Sequence (x16/x32 LPDRAM, x16 PSRAM, x16 NAND). Item JC-63-029||MCP3_12_03||Nov 2006|
|MCP Overview||MCP3_12_00||Jun 2006|